Segmented DAC Mismatch Correction for Spur Reduction

The patent applies preliminary action by measuring and storing correction values for each segment's gain and clock skew errors before normal DAC operation. The correction values are determined in advance through calibration procedures and stored in lookup tables, allowing the mismatch correction to be applied automatically during operation without real-time measurement, thus resolving the segment mismatch problem while maintaining high resolution

The patent changes the parameters of the digital input words by adding correction values that compensate for segment mismatch errors. The correction values adjust the amplitude and timing parameters of the digital signals driving each segment, thereby compensating for gain and clock skew variations caused by fabrication imperfections and reducing harmonic distortions

The patent reduces complexity by performing mismatch correction measurements and storing correction values in advance. During normal operation, the system only needs to retrieve and apply pre-computed correction values from lookup tables using simple adders, rather than performing complex real-time measurements and calculations, thus improving SFDR while minimizing additional circuit complexity

The patent implements self-service by having the DAC system perform its own self-calibration and self-correction. The system automatically measures its own segment mismatch errors during calibration mode and generates correction values internally, eliminating the need for external calibration equipment and reducing overall system complexity