Segmented Display Sub-Portions for Refresh Rate Power Optimization
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Solution Overview
Problem
Display apparatuses face challenges in maintaining low power consumption while achieving high refresh rates, as transistors with high-speed switching capabilities exhibit significant leakage current, and those with low leakage current increase power consumption for driver circuits during low refresh rate operations.
Innovation Solution
The display apparatus employs a stacked structure with multiple sub-display portions, each having different transistor types, such as metal oxide and silicon-based transistors, and strategically places gate line driver circuits and source line driver circuits to optimize image rewriting frequencies and reduce power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If transistors with high-speed switching capabilities are used to achieve high refresh rates, then display performance with high refresh rate is improved, but leakage current increases making it difficult to perform display at low refresh rate
Solution Approach 1:
The display apparatus is divided into multiple independent sub-display portions (first sub-display portion and second sub-display portion), each capable of operating at different refresh rates. This segmentation allows the system to optimize power consumption by running less critical regions at lower refresh rates while maintaining high refresh rates in critical regions, thereby reducing overall leakage current while preserving display performance where needed.
Solution Approach 2:
The system dynamically adjusts the image rewriting frequency for each sub-display portion based on operational requirements. The control circuit can independently set different refresh rates for the first and second sub-display portions, enabling adaptive power management that reduces leakage current during low-activity periods while maintaining high performance when needed.
2Loss of energy
If transistors with small leakage current are used to enable low refresh rate display, then power consumption during low refresh rate is reduced, but power consumption of driver circuits increases when entire screen is refreshed
Solution Approach 1:
By segmenting the display into multiple sub-display portions with independent driver circuits, the system can selectively activate only the necessary portions during refresh operations. This reduces the overall power consumption of driver circuits when a full screen refresh is not required, while still maintaining the capability to refresh the entire screen when necessary.
Solution Approach 2:
Different sub-display portions can be assigned different transistor types optimized for their specific functional requirements. For example, portions requiring low leakage current can use transistors with small off-state current, while portions requiring high-speed switching can use transistors optimized for speed, thereby optimizing overall power consumption characteristics.
3Reliability
If the entire screen is refreshed at high frequency, then display quality is maintained, but power consumption of driver circuits increases
Solution Approach 1:
The display screen is divided into multiple sub-display portions that can be refreshed independently at different frequencies. This allows the system to maintain high display quality in critical regions by refreshing them at high frequencies while reducing power consumption by refreshing less critical regions at lower frequencies or only when content changes.
Solution Approach 2:
The system implements selective and periodic refreshing of sub-display portions based on content changes and priority levels. Instead of continuously refreshing the entire screen at high frequency, the control circuit refreshes only the necessary portions at appropriate intervals, thereby maintaining display quality while significantly reducing driver circuit power consumption.
Data Source
AI summary
A display apparatus with a novel structure is provided. The display apparatus includes a display portion where a first transistor and a display element are provided to be stacked. The display portion includes a first sub-display portion and a second sub-display portion. The first sub-display portion and the second sub-display portion each include a plurality of pixel circuits each controlling the display element and a gate line driver circuit outputting a signal for driving the plurality of pixel circuits. The gate line driver circuit and the plurality of pixel circuits each include a first transistor. In the display portion, the number of image rewriting times per unit time for image data in the first sub-display portion is smaller than the number of image rewriting times per unit time for image data in the second sub-display portion.