Segmented Field Plate Layout for High-Voltage Leakage Suppression
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Solution Overview
Problem
High voltage semiconductor devices face challenges in suppressing leakage current between the high voltage circuit region and the transistor element region due to potential fluctuations and parasitic transistors, leading to increased ON resistance and potential inversion of the conductivity type on the isolation region.
Innovation Solution
A semiconductor device configuration that includes a capacitively coupled field plate with multiple lines of conductors extending along the outer circumference of the high voltage circuit region and across the transistor element region, featuring dividing sections to make at least one line discontinuous, which reduces leakage current and stabilizes surface potentials, and optionally includes a RESURF region and a shield electrode to further suppress leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a continuous field plate is used to maintain low ON resistance, then electrical conductivity is improved, but leakage current increases due to parasitic transistors activated by potential fluctuations
Solution Approach 1:
The field plate is divided into multiple independent lines of conductors rather than using a single continuous structure. This segmentation allows each line to be independently controlled, preventing potential fluctuations from spreading across the entire field plate and activating parasitic transistors in the isolation region, thereby suppressing leakage current while maintaining overall field plate functionality.
Solution Approach 2:
Different regions of the field plate are configured with different characteristics. The field plate lines are positioned to extend along the outer circumference of the high voltage circuit region and across the transistor element region, with dividing sections strategically placed to create local discontinuities. This local differentiation allows the field plate to maintain low ON resistance in critical areas while suppressing leakage current in isolation regions through controlled discontinuities.
2Reliability
If the field plate extends across the isolation region to maintain low ON resistance, then electrical conductivity is improved, but conductivity type inversion occurs on the isolation region surface
Solution Approach 1:
The field plate is segmented into multiple lines with dividing sections that create controlled discontinuities. These discontinuities prevent the formation of continuous high electric fields across the isolation region surface, thereby preventing conductivity type inversion while still maintaining sufficient field plate effect to keep ON resistance low through the combined action of multiple lines.
Solution Approach 2:
The field plate configuration creates different electric field distributions in different regions. Lines extend continuously in areas where low ON resistance is critical, while dividing sections are placed in isolation regions where conductivity type stability is paramount. This local quality differentiation resolves the contradiction by optimizing each region for its primary requirement.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses leakage current and maintains low ON resistance by stabilizing surface potentials and preventing conductivity type inversion, even when potential differences exist between the high voltage circuit and transistor element regions.
Implementation Method 1
a capacitively coupled field plate including plural lines of conductors
Data Source
AI summary
A semiconductor device according to one or more embodiments may include: on a semiconductor substrate, a high voltage circuit region; a transistor element region; an isolation region that elementally isolates the transistor element region from the high voltage circuit region; and a capacitively coupled field plate including plural lines of conductors, wherein the capacitively coupled field plate is provided to extend circumferentially along an outer circumferential portion of the high voltage circuit region and across the transistor element region, in a plan view of the semiconductor device, and one or more dividing sections divides at least one of the plural lines of conductors in the capacitively coupled field plate to make the at least one line discontinuous.