Segmented Frame Counter for Low-Overhead Clock Synchronization

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Solution Overview

Problem

Existing communication systems face challenges in distributing a common real-time clock over a network with minimal time variations between nodes while requiring low memory and processing power, especially for real-time applications like synchronous streaming data.

Innovation Solution

A communication system with a first port generating frames containing a preamble, data field, and time field, where the transmit frame counter value is segmented and distributed across multiple frames, allowing precise synchronization by decoding consecutive frames, and a second port reassembling the counter value with a receive time register, enabling efficient and precise clock synchronization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If bidirectional communication is used for time synchronization between network nodes, then synchronization precision is improved, but network load and computing power requirements increase significantly

Engineering Contradiction:
Improvetime synchronization precisionVSAvoidnetwork load
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The transmit frame counter value is segmented into multiple segments (e.g., 4 segments of 8 bits each for a 32-bit counter) and distributed across multiple consecutive frames. Each frame carries only a portion of the time information, reducing the overhead in any single frame while maintaining high precision synchronization when the segments are reassembled at the receiving end.

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If high precision timing synchronization is implemented, then clock synchronization accuracy is improved, but memory and processing power requirements increase

Engineering Contradiction:
Improveclock synchronization accuracyVSAvoidmemory and processing power requirements
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The time information is divided into segments distributed across multiple frames, reducing the memory buffer requirements at any single node compared to storing complete high-precision timing data. The segmentation allows incremental processing rather than requiring full timing data to be held in memory simultaneously.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Only the essential time synchronization information (counter segments) is extracted and transmitted in the time fields of frames, separating it from other data traffic. This extraction approach minimizes processing requirements by focusing only on the critical synchronization elements rather than processing complete data streams.

Inventive Principle:
Principle #2Taking out (Extraction)

3Measurement precision

If complete transmit frame counter values are transmitted in each frame, then synchronization precision is improved, but transmission overhead increases

Engineering Contradiction:
Improvesynchronization precisionVSAvoidtransmission overhead
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The complete transmit frame counter value (e.g., 32 bits) is segmented into multiple smaller segments (e.g., four 8-bit segments) that are distributed across multiple consecutive frames. This segmentation reduces the overhead in any individual frame while ensuring high precision synchronization through reassembly of all segments at the receiving end.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The segmented counter values are transmitted periodically across consecutive frames in a systematic sequence. This periodic distribution allows the receiving node to reconstruct the complete time information by collecting segments from multiple frames, achieving high precision without requiring complete counter values in each frame.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentEP2045937B1System and method for real time synchronization through a communication system
Publication Date: 2019.06.19 MICROCHIP TECH GERMANY II
  • EP2045937B1 patent drawingFigure 1
  • EP2045937B1 patent drawingFigure 2~3

AI summary

A communication system, network, interface, and port architecture are provided for transporting of data across a network. The network can be arranged by connecting the ports in a daisy chain fashion to achieve a ring architecture or topology. The network forwards data according to a specific network protocol. A first port forwards frames having time information, where the time information is divided into several pieces, each piece being transmitted in a single frame. A second port receives these frames, stores them in a frame buffer and reassembles the time information from a plurality of frames.