Segmented Gate Driving Circuit for High-PPI Displays
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Solution Overview
Problem
Existing gate driving circuits for OLED displays have complex structures that hinder high resolution and narrow bezel requirements, and leakage in shift register units leads to poor display performance due to uncontrolled node levels.
Innovation Solution
A shift register unit with a first and second sub-circuit and a leakage prevention circuit that controls node levels to prevent leakage, simplifying the circuit structure and reducing bezel size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a gate driving circuit is integrated in a GATE IC, then the display device can be driven, but the chip area increases affecting cost
Solution Approach 1:
The gate driving circuit is divided into multiple shift register units (first shift register unit, second shift register unit, etc.), each handling a portion of the scanning lines. This segmentation allows the total chip area to be distributed across multiple smaller units rather than requiring one large integrated circuit, thereby reducing the area burden on a single chip while maintaining complete gate driving capability.
Solution Approach 2:
The patent transitions from a single-plane IC integration to a multi-layer structure where shift register units are arranged in multiple stages (first stage, second stage) with inter-stage signal transmission. This dimensional organization allows the gate driving circuit to extend across multiple layers or planes, effectively utilizing three-dimensional space to reduce the footprint on any single chip layer.
2Area of stationary object
If the circuit structure is simplified to reduce bezel size, then PPI increases, but leakage control becomes more difficult
Solution Approach 1:
The leakage prevention circuit acts as an intermediary component between the simplified shift register units and the nodes that require level control. It mediates the potential leakage issues by actively monitoring and correcting node levels without requiring complex circuit structures in the main signal path, thus maintaining both simplicity and reliability.
Solution Approach 2:
The leakage prevention circuit performs preliminary action by proactively preventing node level leakage before it can affect display performance. Rather than reacting to leakage problems after they occur, the circuit continuously maintains proper node levels through preventive control mechanisms, ensuring signal integrity throughout operation.
3Reliability
If leakage prevention circuit is added to control node levels, then display performance improves, but circuit complexity increases
Solution Approach 1:
The leakage prevention function is extracted as a separate, dedicated circuit module from the main shift register signal path. By isolating the leakage control functionality into a distinct subsystem with specialized components (leakage prevention transistors, level control circuits), the main circuit remains simple while the extracted leakage prevention module handles the complexity of node level management independently.
4Manufacturing precision
If multiple shift register units are cascaded to drive more scanning lines, then display resolution increases, but signal transmission complexity increases
Solution Approach 1:
The cascaded shift register units operate in a periodic sequence where each unit processes and transmits signals in structured time intervals. The first shift register unit processes signals during one period, then passes control to the second unit in the next period, creating a rhythmic, predictable signal flow pattern that simplifies timing control and reduces transmission complexity compared to simultaneous multi-channel operation.
Data Source
AI summary
A shift register unit, a gate driving circuit, a display device, and a driving method are disclosed. The shift register unit includes a first sub-circuit, a second sub-circuit, a leakage prevention circuit and a blanking input sub-circuit, wherein the first sub-circuit includes a first input circuit and a first output circuit; the second sub-circuit includes a second input circuit and a second output circuit; the leakage prevention circuit is configured to control a level of a leakage prevention node under control of the level of the first node, so as to turn off a circuit connected between the first node and the leakage prevention node; and the blanking input sub-circuit is connected to the first node and the second node, and is configured to receive a selection control signal and a first clock signal, and control the level of the first node and the level of the second node.