Segmented Gate Structure for Low-GIDL Medium-Voltage MOSFETs

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Solution Overview

Problem

The existing methods for manufacturing medium voltage (MV) devices face challenges in reducing gate-induced drain leakage (GIDL) due to the limited thickness of spacers, which is exacerbated by the integration of high and low voltage devices on a 28 nm HK platform, leading to poor leakage performance.

Innovation Solution

The gate conductive material layer is segmented into a body and edge layers using dielectric segmentation structures, with lightly doped drain regions extending to the body layer, increasing spacer thickness and reducing leakage by maintaining channel conductivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If the gate spacer thickness is increased to reduce GIDL leakage, then the GIDL leakage is reduced, but the pitch constraint of SRAM cannot be met and device integration density decreases

Engineering Contradiction:
ImproveGIDL leakageVSAvoiddevice integration density
Core Design Contradiction:
Object-affected harmful factorsVSArea of stationary object

Solution Approach 1:

The gate conductive material layer is segmented into a body gate conductive material layer and edge gate conductive material layers using dielectric segmentation structures. This segmentation allows the lightly doped drain regions to extend laterally and cover the channel region, effectively increasing the spacer thickness equivalent to the isolation layer without increasing the actual spacer thickness, thereby reducing GIDL leakage while maintaining integration density

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from increasing spacer thickness in the lateral dimension to achieving equivalent isolation effect through vertical extension of lightly doped drain regions and dielectric segmentation structures. This dimensional transformation allows GIDL reduction without compromising the lateral pitch constraints of SRAM devices

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Object-affected harmful factors

If the gate spacer thickness is increased to reduce GIDL leakage, then the GIDL leakage is reduced, but additional lithography processes and manufacturing complexity increase

Engineering Contradiction:
ImproveGIDL leakageVSAvoidmanufacturing process complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The dielectric segmentation structures are integrated with the existing gate structure fabrication process. The segmentation is achieved by patterning the gate conductive material layer itself, merging the isolation structure formation with the gate electrode formation into a single process flow, thereby avoiding additional lithography steps and manufacturing complexity

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The gate conductive material layer serves dual purposes: as the gate electrode material and as the structure to be segmented for creating isolation regions. The lightly doped drain regions automatically extend to provide the required isolation function, eliminating the need for separate spacer thickening processes

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS12622038B2MV device and method for manufacturing same
Publication Date: 2026.05.05 SHANGHAI HUALI INTEGRATED CIRCUIT CORP
  • US12622038B2 patent drawing
  • US12622038B2 patent drawing
  • US12622038B2 patent drawing

AI summary

An MV device is disclosed. A gate conductive material layer is segmented into a body gate conductive material layer and two edge gate conductive material layers along a channel length direction. The two edge gate conductive material layers are located on two sides of the body gate conductive material layer and are spaced apart from the body gate conductive material layer by dielectric segmentation structures. The lightly doped drain regions extend under the first side face and the second side face of the gate conductive material layer, to reach under the body gate conductive material layer, such that the channel region becomes located under the body gate conductive material layer; and the edge gate conductive material layers and the dielectric segmentation structures become located above the lightly doped drain regions. The present disclosure also discloses a method for manufacturing an MV device.