Segmented Translinear Gilbert Multiplier for Precision Current Shunt Power Measurement
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Solution Overview
Problem
Conventional analog multipliers, such as MOS stacked differential pair and translinear Gilbert multipliers, face limitations in accuracy and linearity due to transistor base current variations, gain instability, and input offset voltage issues, making them unsuitable for precise current shunt power measurement with errors exceeding ±1%.
Innovation Solution
A segmented translinear Gilbert multiplier circuit with chopping and base current correction circuits is implemented, using multiple multiplier cells interconnected to reduce input offset voltage and correct for base current errors, achieving improved accuracy by subtracting and adding correction currents to the input signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional translinear Gilbert multiplier is used, then the multiplier can perform basic multiplication function, but the accuracy exceeds ±1% deviation due to transistor base current variations and gain instability
Solution Approach 1:
The patent implements feedback mechanisms where the output of the segmented translinear Gilbert multiplier is fed back to correction circuits that adjust for base current variations and gain instability. This feedback loop continuously compensates for deviations, maintaining accuracy within ±1% despite transistor parameter variations.
Solution Approach 2:
The patent dynamically adjusts operating parameters of the transistor circuits to compensate for base current variations and gain instability. By changing bias currents and voltage levels in response to detected errors, the system maintains stable gain and high accuracy across varying conditions.
2Adaptability or versatility
If MOS stacked differential pair multiplier is used, then the circuit can be implemented with MOS transistors, but the accuracy is limited to very small voltage magnitude inputs only
Solution Approach 1:
The patent divides the multiplier circuit into multiple segmented translinear Gilbert multiplier cells connected in series. This segmentation allows the circuit to handle larger input voltage ranges while maintaining accuracy, as each segment processes a portion of the total input signal, preventing saturation and maintaining linearity across a wider dynamic range.
3Measurement precision
If chopping technique is applied to eliminate input offset voltages, then offset errors are reduced, but the circuit complexity increases due to additional switching circuitry
Solution Approach 1:
The patent uses segmented multiplier cells where each segment can be independently chopped. This segmentation allows offset cancellation to be applied selectively to critical sections of the circuit, reducing the overall chopping frequency requirements and simplifying the switching circuitry compared to chopping the entire circuit at high frequency.
4Measurement precision
If base current correction circuits are added to correct for transistor base current errors, then the accuracy improves to within ±1%, but the device complexity increases
Solution Approach 1:
The patent implements base current correction by creating replica copies of the transistor base currents and using these copies to compensate for base current errors in the main signal path. This copying approach allows accurate correction without requiring complex additional circuitry, as the replica circuits mirror the behavior of the signal transistors.
Solution Approach 2:
The correction circuits are designed to be homogeneous with the signal path transistors, using the same transistor types and operating conditions. This homogeneity ensures that the correction mechanisms match the characteristics of the main circuit, improving accuracy while minimizing additional complexity through consistent design practices.
Data Source
AI summary
Multiplier circuitry includes first multiplier circuit including a first transistor having an emitter coupled to a first conductor, a base coupled to a second conductor, and a collector coupled to a third conductor, a second transistor having an emitter coupled to the first conductor, a base coupled to a fourth conductor, and a collector coupled to a fifth conductor, a third transistor having an emitter coupled to the second conductor and a base and collector coupled to a supply voltage, and a fourth transistor having an emitter coupled to the fourth conductor and a base and collector coupled to the supply voltage. Chopper includes a first switch to provide a chopped differential signal between the second and fourth conductors and a second switch for un-chopping a first differential output signal produced between the third and fifth conductors to provide an un-chopped differential output signal between the third and fifth conductors.