Segmented Guard Ring Shielding for Semiconductor Chips
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Solution Overview
Problem
Conventional semiconductor chips with guard rings fail to effectively shield high-frequency electronic signals from noise interference due to increased parasitic reactance, leading to performance deterioration at high operation frequencies.
Innovation Solution
A semiconductor chip design featuring a dielectric ring and a guard ring with individual segments electrically coupled to ground contacts, where the dielectric ring surrounds the circuit region and the guard ring surrounds both the dielectric ring and the circuit region, providing enhanced shielding across a wide frequency range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional guard ring design with continuous trace connection to ground is used, then noise shielding is effective at low frequencies, but parasitic reactance increases at high frequencies causing shielding failure
Solution Approach 1:
The guard ring is divided into multiple individual segments rather than forming a continuous ring. Each segment is independently connected to ground contacts through separate traces, which reduces the parasitic inductance and reactance of the ground connection path. This segmentation allows the guard ring to maintain effective noise shielding at high frequencies by minimizing the harmful parasitic effects.
Solution Approach 2:
A dielectric ring is introduced as an intermediary layer between the guard ring segments and the underlying circuit region. This dielectric ring provides electrical isolation and helps manage the electromagnetic field distribution, reducing coupling between the guard ring and signal traces while maintaining the shielding effect.
2Speed
If operation frequency is increased to improve performance, then signal transmission capability is enhanced, but noise interference increases due to parasitic phenomena
Solution Approach 1:
By segmenting the guard ring into multiple independent sections with separate ground connections, the patent reduces the parasitic inductance that would otherwise increase with frequency. This allows the circuit to operate at higher frequencies while maintaining effective noise shielding, as each segment independently manages the electromagnetic interference without the cumulative parasitic effects of a continuous ground path.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed design effectively shields the semiconductor chip from noise interference, maintaining performance even at high frequencies by reducing parasitic reactance and ensuring better noise expulsion.
Implementation Method 1
the reactance induced by the parasitic phenomenon is increased along with the rising of the operation frequency of the IC chip 100
Implementation Method 2
a guard ring 122 design is further applied... the guard ring 122 can be electrically coupled to the ground contact 140... the noise on the signal contact 130 is smoothly expelled from the IC chip 100
Data Source
AI summary
A semiconductor chip including a substrate, a metal interconnection structure and a circuit region is provided. The substrate has at least one dielectric ring on a substrate surface of the substrate. The metal interconnection structure is disposed on the substrate surface and has at least one guard ring, wherein the guard ring comprises a plurality of individual segments, and the individual segments are individually and electrically coupled to the ground contacts. The circuit region disposed on the substrate. A projection of the dielectric ring on the substrate surface surrounds a projection of the circuit region on the substrate surface, and the projection of the guard ring on the substrate surface surrounds that of the dielectric ring and that of the circuit region on the substrate surface.