Segmented Integrated Power Stage for High-Current Switching
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Solution Overview
Problem
High power switching power supplies face issues with large, high parasitic capacitance MOSFETs, significant noise due to large current switching, and inefficiencies from non-overlap times in discrete power stages, which affect performance and power efficiency.
Innovation Solution
An integrated power stage with a segmented switch circuit and driver circuit that controls switch segments in parallel, allowing for dynamic transition control and operation in multiple power modes, reducing parasitic capacitances and inductances, and minimizing noise and non-overlap times.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If discrete high power MOSFETs are used to handle high currents, then the power supply can deliver high power, but the parasitic capacitances of the MOSFETs increase significantly, reducing system performance
Solution Approach 1:
The power stage is divided into multiple parallel switch segments instead of using a single discrete MOSFET. Each segment contains smaller MOSFETs with lower individual parasitic capacitances. By segmenting the power stage, the patent maintains high current handling capability while reducing overall parasitic effects that degrade performance.
Solution Approach 2:
Multiple switch segments are integrated into a single integrated power stage device rather than using discrete components. This merging approach allows for optimized internal layout and interconnections that reduce parasitic inductances and capacitances compared to discrete implementations, while maintaining the high power delivery capability.
2Ease of operation
If large currents are used to switch power MOSFETs on and off, then the power MOSFETs can be controlled, but significant system noise is generated through coupling and ground return path parasites
Solution Approach 1:
The switching current is distributed across multiple parallel switch segments instead of flowing through a single large MOSFET. This segmentation reduces the peak current required for switching any individual segment, thereby reducing noise generation through parasitic coupling and ground return paths while maintaining full control capability.
3Reliability
If non-overlap timing is used to prevent shoot-thru current, then shoot-thru current is minimized, but power efficiency is reduced due to diode conduction during non-overlap time
Solution Approach 1:
The non-overlap time is made dynamic rather than fixed. The timing controller adjusts the non-overlap duration based on operating conditions such as load current and switching frequency. This dynamic adjustment allows the system to maintain shoot-thru prevention while minimizing the energy loss during non-overlap periods by reducing unnecessary diode conduction time.
Data Source
AI summary
Methods and apparatus for a power supply according various aspects of the present invention operate in conjunction with a voltage converter for converting an input voltage to an output voltage. For example, the converter may comprise an output controller configured to generate a control signal, a power mode controller, and an integrated power stage. The power stage may include a multiple switch segments coupled in parallel between the input voltage and the output, and a driver circuit responsive to the output controller and the power mode controller and connected to the switch segments. The driver circuit controls the switch segments according to the control signal to activate the switch segments in the switch circuit. The driver circuit also disables one or more of the switch segments according to the power mode signal to permit reduced power delivery and demand states.