Segmented Interposer Design for EMI Shielding and Warpage Reduction
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Solution Overview
Problem
In electronic devices, interposers with a single interior space can lead to electromagnetic interference (EMI) between components and increased stress due to warpage of printed circuit boards, resulting in poor contact between slave circuit boards and interposers.
Innovation Solution
The use of multiple interposers on a main printed circuit board, with each interposer connected to a separate slave circuit board, reduces stress and deformation, and provides electrical shielding to block EMI noise by segregating components generating and affected by EMI into different interposer spaces.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single interposer with one interior space is used to connect multiple printed circuit boards, then the device complexity is reduced, but electro-magnetic interference occurs between electronic parts disposed in the interior space
Solution Approach 1:
The patent divides a single large interposer into multiple smaller interposers, each with its own interior space. This segmentation allows electronic parts to be distributed across separate interposers, preventing electro-magnetic interference while maintaining manageable device complexity. Each interposer connects to the main printed circuit board and can independently house electronic components.
2Adaptability or versatility
If the interposer has a complicated shape to form one interior space, then it can connect multiple printed circuit boards, but stress applied to the interposer by warpage of the printed circuit boards is increased
Solution Approach 1:
The patent segments the interposer structure into multiple smaller interposers, each with a simpler shape. This reduces the stress each individual interposer experiences from printed circuit board warpage, while the collective arrangement of multiple interposers maintains the capability to connect multiple printed circuit boards effectively.
3Reliability
If multiple interposers are used to reduce stress and block EMI, then the reliability is improved, but the device complexity increases
Solution Approach 1:
The patent uses multiple smaller interposers instead of a single large interposer. This segmentation improves reliability by reducing stress on each interposer (minimizing warpage effects) and blocking EMI through spatial separation of electronic parts. The complexity increase is offset by the modular nature of the segmented design, making each interposer simpler and more reliable.
Solution Approach 2:
Each interposer acts as an intermediary between the main printed circuit board and slave printed circuit boards. This intermediary structure provides mechanical support and electrical connection while isolating electronic parts from each other, thereby improving contact reliability and preventing poor contact issues.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration minimizes deformation of slave circuit boards, prevents poor contact, and efficiently blocks EMI noise, improving the reliability and performance of electronic devices.
Implementation Method 1
The use of multiple interposers on a main printed circuit board, with each interposer connected to a separate slave circuit board, reduces stress and deformation, and provides electrical shielding to block EMI noise by segregating components generating and affected by EMI into different interposer spaces.
Data Source
AI summary
An electronic device includes a processor and a printed circuit board on which the processor is mounted. The printed circuit board includes a first circuit board, a first interposer formed on a first portion of the first circuit board, a second interposer formed on a second portion of the first circuit board that is adjacent to the first portion, a second circuit board coupled to the first interposer, and a third circuit board coupled to the second interposer.


