Segmented LCD Gate Driver Reduces Wiring RC Time Constant

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Solution Overview

Problem

Large liquid crystal display panels with high resolution and large screen sizes face challenges in high-speed driving due to increasing resistance and capacitance of array wirings, making it difficult to achieve efficient high-speed operation.

Innovation Solution

The implementation of a liquid crystal display device structure with a divided active area into two regions, each with a gate line group and a dummy gate line group, allowing for parallel processing and reduced wiring resistance and capacitance, enabling faster image signal and non-image signal writing within one-frame period.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the screen size and resolution are increased, then the display quality is improved, but the resistance and capacitance of array wirings increase, making high-speed driving difficult

Engineering Contradiction:
Improvedisplay resolutionVSAvoiddriving speed
Core Design Contradiction:
Measurement precisionVSSpeed

Solution Approach 1:

The liquid crystal display panel is divided into two separate display areas, each with its own gate driver circuit. This segmentation allows independent driving of each area, effectively halving the wiring length and reducing the time constant of array wirings, thereby enabling high-speed driving while maintaining large screen size and high resolution

Inventive Principle:
Principle #1Segmentation

2Area of stationary object

If the screen size is increased, then the display area is enlarged, but the wiring resistance increases, reducing driving efficiency

Engineering Contradiction:
Improvedisplay areaVSAvoiddriving efficiency
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The large display panel is segmented into two independent display areas, each driven by a separate gate driver circuit. This reduces the total wiring length and resistance in each segment, improving driving efficiency and reliability while maintaining the overall large display area

Inventive Principle:
Principle #1Segmentation

3Measurement precision

If the resolution is increased, then the image quality is improved, but the capacitance of array wirings increases, increasing the time constant

Engineering Contradiction:
Improveimage resolutionVSAvoidtime constant
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

By dividing the high-resolution display into two separate areas, each area's wiring capacitance is reduced proportionally. This segmentation decreases the time constant (τ = RC) of array wirings, enabling faster charging/discharging cycles and supporting high-resolution displays at high refresh rates

Inventive Principle:
Principle #1Segmentation

4Device complexity

If a single gate driver circuit is used, then the device complexity is reduced, but the writing speed of image signals is insufficient for high-speed operation

Engineering Contradiction:
Improvegate driver configurationVSAvoidsignal writing speed
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The gate driver system is segmented into two independent circuits, each responsible for one display area. This allows parallel processing of image signals for different areas, effectively doubling the signal writing speed and enabling high-speed operation while maintaining manageable device complexity through modular architecture

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8736588B2Liquid crystal display device
Publication Date: 2014.05.27 MAGNOLIA WHITE CORP
  • US8736588B2 patent drawing
  • US8736588B2 patent drawing
  • US8736588B2 patent drawing

AI summary

In one embodiment, a liquid crystal display device includes first and second areas respectively having a gate line group in an active area, and a dummy gate line group arranged on an outside of the active area. A driving circuit selects the gate lines of the gate line group and the dummy gate lines of the dummy gate line group one by one in the first and second areas. The driving circuit is independently controlled for the first and second areas. The gate lines are scanned from a center portion of the active area to the dummy gate line side in the first and second areas, respectively. An image signal and a non-image signal are written within one-frame period in the first and second areas.