Segmented Insulator Liner for Buried Bit Line Formation

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Solution Overview

Problem

The conventional method for forming buried bit lines in semiconductor devices faces challenges due to the requirement of a thick liner layer, which reduces trench space for ion implantation and deepening, making it difficult to achieve the necessary depth for forming separated buried bit lines in narrow trenches.

Innovation Solution

A semiconductor device and method involving a substrate with trenches, a first insulative liner layer divided into upper and lower segments, and a bit-forming surface uncovered by the liner layer, allowing for dopant diffusion to form buried bit lines that extend into the trench side walls, facilitating easier resistance control and trench deepening.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a thick liner layer is used to prevent scattering of implantation ions, then the liner layer provides sufficient protection, but the trench space available for ion implantation and trench deepening is considerably reduced

Engineering Contradiction:
Improveprotection against ion scatteringVSAvoidtrench space for ion implantation
Core Design Contradiction:
ReliabilityVSVolume of moving object

Solution Approach 1:

The liner layer is segmented into a first liner layer (thick, for protection) and a second liner layer (thin, for isolation), allowing the thick protective layer to coexist with sufficient trench space for ion implantation and deepening

Inventive Principle:
Principle #1Segmentation

2Reliability

If a thick liner layer is used to prevent ion scattering, then the liner layer provides sufficient protection, but the trench deepening process becomes more difficult due to narrow space

Engineering Contradiction:
Improveprotection against ion scatteringVSAvoidtrench deepening process
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The liner layer is divided into two segments with different thicknesses and materials, where the first thick liner layer provides protection while the second thin liner layer facilitates easier trench deepening and bit line formation

Inventive Principle:
Principle #1Segmentation

3Productivity

If the trench width is reduced to increase storage capacity, then the storage capacity increases, but the space for forming separated buried bit lines becomes insufficient

Engineering Contradiction:
Improvestorage capacityVSAvoidtrench space for bit line formation
Core Design Contradiction:
ProductivityVSVolume of moving object

Solution Approach 1:

The liner layer is segmented into thick and thin portions, enabling sufficient space for forming separated buried bit lines even in narrow trenches, thus maintaining high storage capacity while allowing proper bit line formation

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different portions of the liner layer have different thicknesses and materials optimized for different functions: the first liner layer provides protection and isolation, while the second liner layer provides sufficient space for bit line formation in the narrow trench region

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for the formation of buried bit lines with improved control over height and position, alleviating the difficulties of ion implantation and deepening in narrow trenches, enhancing the efficiency of semiconductor device fabrication.

Implementation Method 1

diffusing a dopant into the substrate through the bit-forming surface to form a buried bit line that extends inwardly from the bit-forming surface into each of the trench side walls

Methodology Applied
Scientific EffectDiffusion: Diffusion

Data Source

PatentUS8956961B2Semiconductor device and method for making the same
Publication Date: 2015.02.17 MICRON TECHNOLOGY INC
  • US8956961B2 patent drawing
  • US8956961B2 patent drawing
  • US8956961B2 patent drawing

AI summary

A semiconductor device includes: a substrate having a base and an array of semiconductor pillars extending from the base, the substrate being formed with a plurality of trenches, each of which extends into the base and has two opposing trench side walls; a first insulative liner layer formed on each of the trench side walls of each of the trenches and divided into upper and lower segments by a gap that leaves a bit-forming surface of each of the trench side walls uncovered by the first insulative liner layer; and a plurality of buried bit lines, each of which extends into the base from the bit-forming surface of a respective one of the trench side walls of each of the trenches.