Segmented 3D Vertical Memory Cell Structures Block Leakage
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Solution Overview
Problem
3D vertical memory arrays face the 'sneak leakage path' problem, where current can flow through the selector layer to unselected word lines, causing read errors due to the conductor nature of the selector layer in conventional cell structures.
Innovation Solution
The implementation of segmented selector and memory layers in 3D vertical cell structures, where each selector and memory layer is formed as segments to block sneak path leakage current, and specific process flows are used to deposit these layers, ensuring each cell has isolated segments to prevent current flow to adjacent word lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional vertical cell structure with a continuous selector layer is used, then the device complexity is reduced and manufacturing is easier, but sneak leakage current flows through the selector layer to unselected word lines causing read errors
Solution Approach 1:
The patent applies segmentation by dividing the continuous selector layer into discrete segmented selectors, where each selector is isolated to a specific memory cell location. This prevents sneak leakage current from flowing through the selector layer to adjacent unselected word lines, as each segmented selector only controls current flow for its designated cell, thereby improving read accuracy while managing device complexity through systematic segmentation of the cell structure
2Reliability
If segmented selector layers are implemented to block sneak path leakage current, then read accuracy is improved, but the manufacturing process becomes more complex requiring precise deposition and etching
Solution Approach 1:
The patent applies preliminary action by forming the segmented selectors and memory layers in a specific sequence during the deposition process. The selector layer is deposited first, then patterned and etched to create segmented structures before subsequent layers are added. This preliminary structuring ensures that when the full device is manufactured, the segmented selectors are already in place to prevent sneak leakage, making the overall manufacturing process more manageable despite the increased complexity
3Reliability
If individual segmented selectors are formed for each memory cell, then sneak leakage is eliminated, but the manufacturing precision requirements increase for layer deposition and alignment
Solution Approach 1:
The patent applies the nested doll principle by forming the segmented selectors and memory layers in a nested sequence where each layer is deposited and patterned in relation to the previous layer. The segmented selectors are formed first, then memory layers are deposited within the defined boundaries of the segmented selectors. This nested approach ensures precise alignment without requiring separate high-precision alignment steps, as each layer naturally conforms to the structure below it, thereby maintaining current flow control reliability while managing manufacturing precision requirements
Data Source
AI summary
Three-dimensional vertical memory array cell structures and processes. In an exemplary embodiment, a cell structure includes a word line, a selector layer, and a memory layer. The word line, the selector layer, and the memory layer form a vertical cell structure in which at least one of the selector layer and the memory layer are segmented to form a segment that blocks sneak path leakage current on the word line.