Segmented Metal Strapping for Polysilicon Line Delay Reduction

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Solution Overview

Problem

As the scale of integration in semiconductor integrated circuit devices increases, the width of metal strapping lines has not kept pace with the reduction in polysilicon line width, leading to inefficiencies in reducing resistivity and delay in RC networks, particularly when modeling polysilicon lines as purely resistive loads without considering capacitance.

Innovation Solution

The use of metal lines segmented into multiple segments to strategically strap polysilicon lines, with specific segment lengths optimized using the Elmore delay technique to minimize delay, taking into account both resistance and capacitance, and adjusting the position and number of segments to achieve balanced and minimized delays across the circuit.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If metal lines are used to strap polysilicon lines to reduce resistivity, then the resistivity of polysilicon lines is reduced, but the width of metal strapping lines has not kept pace with the reduction in polysilicon line width, leading to inefficiencies

Engineering Contradiction:
Improveresistivity reductionVSAvoidstrapping efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The metal strapping line is divided into multiple segments along its length. Each segment is positioned to strap a specific portion of the polysilicon line. This segmentation allows the metal line to maintain effective strapping functionality while adapting to reduced polysilicon line widths, thereby improving strapping efficiency without sacrificing resistivity reduction.

Inventive Principle:
Principle #1Segmentation

2Device complexity

If polysilicon lines are modeled as purely resistive loads, then the modeling is simplified, but the delay calculation is inaccurate because capacitance is not considered

Engineering Contradiction:
Improvemodeling complexityVSAvoiddelay calculation accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The modeling approach is changed from considering only resistive parameters to including both resistive and capacitive parameters. By incorporating capacitance into the polysilicon line model alongside resistance, the delay calculation becomes more accurate while maintaining manageable complexity through systematic analysis methods.

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If the metal line width is not reduced at the same rate as polysilicon line width, then manufacturing is easier, but the strapping effectiveness is reduced due to inefficiencies in RC networks

Engineering Contradiction:
Improvemetal line fabricationVSAvoidstrapping effectiveness
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The metal strapping line is divided into multiple segments along its length. Each segment is positioned to strap a specific portion of the polysilicon line. This segmentation allows the metal line to maintain effective strapping functionality while adapting to reduced polysilicon line widths, thereby improving strapping efficiency without sacrificing resistivity reduction.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different segments of the metal line are positioned at specific locations along the polysilicon line to optimize strapping effectiveness in different regions. This local optimization ensures that each portion of the polysilicon line receives appropriate strapping support, maintaining overall strapping effectiveness even when metal line width cannot be scaled down proportionally.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS7829459B2Method and apparatus for strapping two polysilicon lines in a semiconductor integrated circuit device
Publication Date: 2010.11.09 SILICON STORAGE TECHNOLOGY INC
  • US7829459B2 patent drawing
  • US7829459B2 patent drawing
  • US7829459B2 patent drawing

AI summary

A method and apparatus for partially strapping two polysilicon lines, each having a first end and second end, uses a metal line having a plurality of spaced apart metal segments with each metal segment partially strapping a different portion of a polysilicon line. The metal segments are arranged from the first end to the second end with the signals propagating from the second end to the first end. Where two metal segments are used, the segments have lengths ofx=2⁢⁢L7and L-X where L is the length between the first end and the second end. Where three segments are used, the segments have lengths of X=0.25 L, Y=0.48 L, and Z=0.27 L.