Segmented Metallization Features to Reduce Void Formation
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Solution Overview
Problem
As semiconductor devices are scaled down, the challenge of forming reliable metallization lines in inter-metal dielectric layers becomes increasingly difficult due to the complexity of filling openings with conductive materials, often resulting in voids that adversely impact device performance.
Innovation Solution
A method is introduced where a metallization line is formed in a trench with a greater length than the final metallization features, and then segmented using a metal-cutting operation to create isolated features, which are subsequently filled with a dielectric material to provide mechanical support and electrical isolation, mitigating the gap-filling issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If feature sizes continue to decrease to increase functional density, then production efficiency improves and costs reduce, but fabrication process complexity increases and reliability deteriorates
Solution Approach 1:
The metallization line formation process is segmented into multiple steps: first forming a continuous metallization line in a trench, then performing a metal-cutting operation to segment it into discrete features. This segmentation approach allows each step to be optimized independently, improving overall reliability while maintaining scalability for high-volume production.
Solution Approach 2:
The trench is formed and the continuous metallization line is deposited beforehand, creating a robust structural foundation before the final patterning step. This preliminary action ensures that the metallization features are supported by a pre-formed trench structure, reducing void formation and improving reliability at scaled dimensions.
2Length of moving object
If opening size is reduced to create smaller metallization features, then device scaling is achieved, but void formation increases and filling reliability deteriorates
Solution Approach 1:
The metallization line is first formed as a continuous structure in the trench, then segmented into discrete features through a metal-cutting operation. This approach allows the filling process to occur at a larger scale (improving precision) while the final feature size is determined by the cutting process, enabling small feature sizes without compromising filling reliability.
Solution Approach 2:
Instead of directly forming small metallization features by filling small openings, the process inverts the sequence: a continuous metallization line is first formed in a larger trench, then the excess metal is removed to create the final small features. This inversion allows the filling step to occur in a more favorable geometric context, reducing void formation.
3Device complexity
If direct filling of small openings is performed to form metallization features, then fabrication steps are minimized, but voids form and adversely impact device performance
Solution Approach 1:
The fabrication process is segmented into distinct operations: trench formation, continuous metallization line deposition, metal-cutting to create discrete features, and dielectric filling. This segmentation allows each step to be optimized for its specific function, improving reliability while the overall process remains integrated and manufacturable.
Solution Approach 2:
The continuous metallization line serves as an intermediary structure between the trench formation and the final discrete metallization features. This intermediary allows the process to bridge the gap between large-scale trench formation and small-scale feature creation, enabling reliable fabrication without direct filling of small openings.
Data Source
AI summary
A method having a semiconductor substrate received and a first dielectric layer is formed over the semiconductor substrate. A trench is formed in the first dielectric layer. The trench is filled to form a conductive layer in the first dielectric layer. The conductive layer is segmented to form a first conductive feature and a second conductive feature separated from each other by a recess. The recess is filled with a second dielectric layer, such that one or both of the conductive features are end-capped by a portion of the first dielectric layer and a portion of the second dielectric layer.


