Segmented Overlay Mark Structure for Systematic Error-Free Measurement
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Solution Overview
Problem
Existing semiconductor devices face challenges in accurately measuring overlay errors between current and pre-layers due to systematic errors, particularly in lithography operations, which affect the precision of pattern alignment.
Innovation Solution
A semiconductor device and method are developed that utilize a new overlay mark structure comprising metallization layers as the pre-layer and openings defined by a dielectric layer as the current layer, allowing for precise measurement of overlay errors without systematic errors, with patterns extending across multiple layers to enhance accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional overlay mark structures are used for measuring overlay errors, then the measurement process is simple, but systematic errors occur between current layer and pre-layer that reduce measurement precision
Solution Approach 1:
The overlay mark structure is segmented into distinct current layer patterns and pre-layer patterns with different geometries and orientations. The current layer includes patterns extending in first and second directions, while the pre-layer includes patterns extending in third and fourth directions, allowing independent characterization and elimination of systematic errors through differential measurement
Solution Approach 2:
A dielectric layer is introduced as an intermediary between the current layer and pre-layer patterns. This dielectric layer with specific refractive index serves as a mediator that enables optical access to the patterns while maintaining physical separation, thereby eliminating direct contact-related systematic errors between layers
2Manufacturing precision
If patterns are aligned perfectly without considering overlay error, then fabrication process is simpler, but alignment precision between layers deteriorates
Solution Approach 1:
The overlay mark structure is formed preliminarily during the fabrication process itself, integrating the measurement functionality into the manufacturing flow. The current layer and pre-layer patterns are formed as part of the device structure, enabling overlay measurement to be performed without adding separate measurement steps
Solution Approach 2:
Different pattern layers utilize different materials with distinct optical properties (refractive indices). The dielectric layer, metal layer, and semiconductor layer each have characteristic optical responses that enable differentiation and precise measurement of relative positions between layers through optical inspection
Data Source
AI summary
A semiconductor device and method for manufacturing the same are provided. The semiconductor device includes a substrate, a first pattern and a second pattern. The first pattern is disposed on the substrate. The first pattern includes a first segment and a second segment, each of which extends along a first direction. The second pattern is disposed on the first pattern. The second pattern includes a first part extending along a second direction different from the first direction. The first part of the second pattern overlaps the first segment and the second segment along a third direction different from the first direction and the second direction. The first pattern and the second pattern are associated with an overlay error.


