Segmented Package Carrier Layout for Dense Signal and Power Routing

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Solution Overview

Problem

Existing package carrier technologies mix signal and power distribution in the same circuit structure, leading to increased thickness and cost due to the need for laser drilling for conductive vias in power layers, which negatively impacts signal layer density.

Innovation Solution

A package carrier design that separates signal and power layers using a signal board, a power board, and a connection layer, where the signal board has thinner and narrower circuits than the power board, with capacitors embedded in the power board for improved stability, and conductive bumps for electrical connection, allowing for independent optimization of signal and power processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If signal and power distribution are mixed in the same circuit structure, then the manufacturing process is simplified, but the thickness of metal and dielectric layers increases and signal layer density decreases

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidthickness of metal and dielectric layers
Core Design Contradiction:
Ease of manufactureVSVolume of moving object

Solution Approach 1:

The patent divides the circuit board into separate signal layers and power layers. The signal layers contain only signal traces with optimized thickness, while the power layer contains power distribution networks with greater thickness. This segmentation allows each layer to be optimized independently, reducing the overall thickness required compared to mixed structures while maintaining manufacturing simplicity through standardized lamination processes.

Inventive Principle:
Principle #1Segmentation

2Power

If power layer thickness is increased to accommodate laser drilling for conductive vias, then power distribution capability is improved, but manufacturing cost increases

Engineering Contradiction:
Improvepower distribution capabilityVSAvoidmanufacturing cost
Core Design Contradiction:
PowerVSEase of manufacture

Solution Approach 1:

By separating power distribution into a dedicated power layer with appropriate thickness, the patent eliminates the need for laser drilling through signal layers. Conductive vias are formed only in the power layer using cost-effective methods, while signal layers maintain their integrity without additional drilling costs. This segmentation reduces manufacturing complexity and cost while preserving power distribution capability.

Inventive Principle:
Principle #1Segmentation

3Device complexity

If signal and power circuits share the same structure, then device complexity is reduced, but signal layer density and manufacturing efficiency decrease

Engineering Contradiction:
Improvecircuit structure complexityVSAvoidsignal layer density and manufacturing efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent implements a segmented architecture where signal layers and power layers are distinctly separated. Signal layers achieve high density with optimized trace routing, while the power layer handles current distribution independently. This segmentation enables parallel manufacturing processes to be applied to different layers, improving overall manufacturing efficiency and signal layer density without significantly increasing device complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent utilizes the vertical dimension by stacking multiple signal layers and power layers in a laminated structure. This dimensional approach allows signal circuits to be distributed across multiple horizontal planes, increasing signal layer density and routing capacity while maintaining clear separation from power distribution paths, thereby improving manufacturing efficiency.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20240243021A1Package carrier and manufacturing method thereof and chip package structure
Publication Date: 2024.07.18 HO CHUNG W
  • US20240243021A1 patent drawing
  • US20240243021A1 patent drawing
  • US20240243021A1 patent drawing

AI summary

A package carrier includes a signal board, a power board and a connection layer. The signal board includes a plurality of first circuits. The power board includes a plurality of second circuits. A line width of each of the first circuits is less than a line width of each of the second circuits, and a first thickness of the signal board is less than a second thickness of the power board. The connection layer is disposed between the signal board and the power board, wherein the power board is electrically connected to the signal board through the connection layer.