Segmented Package Substrate with Stress Buffer for Thermal Mismatch
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The thermal mismatch between silicon-based semiconductor chips and organic package substrates leads to mechanical stress and delamination issues in advanced metallization systems, reducing production yield and reliability due to the use of low-k dielectric materials with reduced mechanical stability and adhesion.
Innovation Solution
The package substrate is divided into multiple sections with a stress buffer region to decouple the mechanical interaction, using resilient materials to reduce deformation and stress, thereby minimizing defects and enhancing reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If low-k dielectric materials are used to reduce signal propagation delay, then electrical performance is improved, but mechanical stability and adhesion are reduced
Solution Approach 1:
The package substrate is divided into multiple independent substrate sections that are mechanically decoupled from each other. This segmentation allows each section to independently accommodate thermal expansion and contraction, reducing the mechanical stress transmitted to the low-k dielectric layers and preventing delamination while maintaining electrical performance.
2Productivity
If substrate area is increased to improve production yield, then manufacturing efficiency is improved, but thermal mismatch stress is increased
Solution Approach 1:
By dividing the large package substrate into multiple smaller substrate sections, the patent reduces the thermal mismatch stress within each section while maintaining the overall large substrate area for high production yield. The mechanical decoupling between sections prevents stress accumulation across the entire substrate.
3Area of stationary object
If feature sizes are scaled down to maximize substrate utilization, then substrate area efficiency is improved, but line-to-line capacitance increases and conductivity decreases
Solution Approach 1:
The patent uses low-k dielectric materials with reduced permittivity values to compensate for the increased line-to-line capacitance caused by scaled-down feature sizes. This parameter change in dielectric constant allows maintaining signal propagation speed while achieving high substrate area utilization through dense circuit element arrangement.
4Productivity
If bump structures are used to establish electrical connections, then connection density is improved, but mechanical stress on metallization layers is increased
Solution Approach 1:
The division of the package substrate into multiple mechanically decoupled sections reduces the transmission of thermal mismatch stress to the bump structures and underlying metallization layers. This allows high connection density through bump structures while minimizing the mechanical stress that would cause delamination of low-k dielectric layers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces mechanical stress and defects in the metallization system, improving production yield and reliability by allowing independent deformation of substrate sections and reducing thermal-induced stress on the semiconductor die.
Implementation Method 1
a stress buffer region laterally separating the first and second substrate sections, wherein the stress buffer region resiliently connects the first and the second substrate sections
Implementation Method 2
this interaction is caused by a thermal mismatch of the corresponding thermal expansion of the different materials
Data Source
AI summary
Thermally induced stress in a semiconductor die, i.e., in a complex metallization system thereof, may be reduced by “dividing” a package substrate into two or more substrate sections, which may have formed therebetween an appropriate stress buffer region, for instance a region of superior resiliency. In this case, the total deformation of the package substrate may be reduced, thereby also reducing the thermally induced stress forces in the complex metallization system of the semiconductor die. Hence, for a given size and complexity of a metallization system, an increased production yield and superior reliability may be achieved.