Segmented Pixel Isolation Structure for Low-Dark-Current Image Sensors
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Solution Overview
Problem
Current image sensors face challenges in achieving improved electrical and optical performance characteristics, particularly in reducing power consumption and dark current issues, which affect their efficiency and resolution in portable devices.
Innovation Solution
The image sensor design incorporates a semiconductor substrate with a pixel isolation structure that includes a semiconductor pattern penetrating from the first surface to the second surface, a sidewall insulating pattern, and a dopant region with varying dopant concentrations, which helps in reducing dark current and improving signal transfer efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If a pixel isolation structure is introduced to reduce dark current, then dark current is reduced, but device complexity increases
Solution Approach 1:
The pixel isolation structure is divided into multiple functional components: a first isolation layer extending from the first surface to a first depth, a second isolation layer extending from the first surface to a second depth greater than the first depth, and a third isolation layer extending from the second surface to a third depth. This segmentation allows each layer to address specific aspects of dark current reduction at different depths and locations, effectively reducing dark current while maintaining manageable structural complexity through modular design.
Solution Approach 2:
Different isolation layers are positioned at different depths and locations within the semiconductor substrate to address dark current generation at specific regions. The first isolation layer addresses shallow regions, the second isolation layer addresses deeper regions, and the third isolation layer addresses the opposite surface regions. This local quality approach ensures that each part of the isolation structure performs its function optimally for its specific location, reducing overall dark current effectively.
2Measurement precision
If photoelectric conversion regions are increased to improve resolution, then resolution is improved, but power consumption increases
Solution Approach 1:
The pixel isolation structure converts the potentially harmful effect of deep trenches (which could generate dark current and increase power consumption) into a beneficial feature by filling them with isolation layers. The first, second, and third isolation layers fill the deep trenches created by the pixel isolation structure, preventing dark current generation while maintaining the high-resolution photoelectric conversion regions. This allows increased photoelectric conversion regions for better resolution without the associated power consumption penalty.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances the electrical and optical performance of image sensors by reducing dark current and power consumption, leading to improved resolution and efficiency in portable devices.
Implementation Method 1
a dopant region in at least a portion of the semiconductor pattern... a dopant concentration in the upper region may be greater than a dopant concentration in the lower region
Implementation Method 2
photoelectric conversion regions of second conductivity type respectively provided in the pixel regions
Data Source
AI summary
An image sensor includes a semiconductor substrate of first conductivity type having first and second surfaces and including pixel regions, photoelectric conversion regions of second conductivity type respectively provided in the pixel regions, and a pixel isolation structure disposed in the semiconductor substrate to define the pixel regions and surrounding each of the photoelectric conversion regions. The pixel isolation structure includes a semiconductor pattern extending from the first surface to the second surface of the semiconductor substrate, a sidewall insulating pattern between a sidewall of the semiconductor pattern and the semiconductor substrate, and a dopant region in at least a portion of the semiconductor pattern.