Segmented Power Interconnect Layout for Low-Noise IC Power Gating
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Solution Overview
Problem
Existing semiconductor integrated circuits face challenges in effectively suppressing power supply noise and reducing leakage current, particularly when power supply switch transistors are included as cells and disposed within the circuit cell area, as they can lead to increased power supply noise and design complexity.
Innovation Solution
The semiconductor integrated circuit incorporates a main-interconnect and sub-interconnects with power supply switch cells that control voltage connection and disconnection based on input signals, along with an auxiliary interconnect to equalize charge accumulation among sub-interconnects, thereby suppressing power supply noise and reducing leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Extent of automation
If power supply switch transistors are included as cells and disposed within the circuit cell area, then the task of arranging power supply switch transistors is simplified and design automation is enhanced, but power supply noise increases
Solution Approach 1:
The power supply network is segmented into multiple independent sub-interconnects, each served by its own power supply switch cell. This segmentation isolates noise generated by individual switch operations, preventing noise propagation across the entire power supply network. The auxiliary interconnect further segments the charge distribution paths, allowing independent charge equalization for each sub-interconnect group.
Solution Approach 2:
The auxiliary interconnect acts as an intermediary element that mediates charge distribution between sub-interconnects. It provides a controlled path for charge equalization, reducing the direct noise coupling between the main-interconnect and individual sub-interconnects. This intermediary structure allows gradual charge balancing rather than abrupt charge redistribution that causes noise spikes.
2Loss of energy
If power supply switch cells are disposed in the circuit cell area, then leakage current is reduced by blocking voltage supply to unused circuit blocks, but device complexity increases
Solution Approach 1:
The power supply switch cells serve multiple functions: they act as leakage current blockers for unused circuit blocks, provide controlled charge equalization paths through the auxiliary interconnect, and enable modular design expansion. This multi-functionality reduces the need for separate dedicated structures for each function, thereby managing device complexity while achieving leakage reduction.
Solution Approach 2:
The auxiliary interconnect is nested within the existing interconnect structure, utilizing available routing resources rather than adding completely separate external structures. The power supply switch cells are integrated into the circuit cell area, nesting the power management function within the existing circuit layout framework, thus minimizing additional device complexity.
3Object-generated harmful factors
If multiple sub-interconnects are used to connect circuit cells, then power supply noise can be suppressed through charge equalization, but the area of the interconnect structure increases
Solution Approach 1:
Multiple sub-interconnects are merged into a unified power supply network through the auxiliary interconnect, which combines their charge distribution functions. This merging allows the system to achieve noise suppression through coordinated charge equalization while sharing common routing resources, thereby reducing the total interconnect area compared to completely separate independent interconnect structures.
Solution Approach 2:
The auxiliary interconnect utilizes additional routing dimensions or layers to connect sub-interconnects, rather than expanding the interconnect area in the primary plane. By transitioning to another dimensional space for auxiliary connections, the design achieves charge equalization functionality without proportionally increasing the overall interconnect footprint.
Data Source
AI summary
A semiconductor integrated circuit includes: a main-interconnect to which supply voltage or reference voltage is applied; a plurality of sub-interconnects; a plurality of circuit cells configured to be connected to the plurality of sub-interconnects; a power supply switch cell configured to control, in accordance with an input control signal, connection and dis-connection between the main-interconnect and the sub-interconnect to which a predetermined one of the circuit cells is connected, of the plurality of sub-interconnects; and an auxiliary interconnect configured to connect the plurality of sub-interconnects to each other.