Segmented Power Supply Topology for CPU Sleep During Active Display
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Solution Overview
Problem
Current processor power management systems are inefficient as they cannot enter deeper sleep states when the display is active, leading to increased power consumption and reduced battery life in mobile devices due to shared power planes with display subsystems.
Innovation Solution
A power supply topology that powers the display subsystem separately from other CPU components, using an external voltage regulator and on-die voltage regulators to allow the CPU to enter sleep states while maintaining an active display, thereby reducing power dissipation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the CPU shares power planes with the display subsystem, then the display can remain active during CPU sleep states, but the CPU cannot enter deeper sleep states leading to increased power consumption
Solution Approach 1:
The power supply topology is segmented into separate power planes: a first power plane dedicated to the display subsystem and a second power plane dedicated to the CPU. This segmentation allows independent power management, enabling the CPU to enter deep sleep states (C-states) while the display remains active on its separate power plane, thereby resolving the contradiction between deep sleep capability and display continuity.
Solution Approach 2:
The display subsystem is extracted from the shared power plane and placed on a dedicated first power plane. This extraction allows the CPU on the second power plane to be completely powered down during deep sleep states without affecting the display's operation, thus enabling deeper CPU sleep states while maintaining display activity.
2Use of energy by moving object
If the CPU enters deeper sleep states, then power consumption is reduced, but the display must be powered off
Solution Approach 1:
By segmenting the power supply into separate power planes for the display and CPU, the invention enables the CPU to enter deeper sleep states while the display subsystem remains powered and operational on its dedicated power plane, thus maintaining display operation continuity while reducing overall power consumption.
3Duration of action of stationary object
If the CPU remains active to support display operations, then the display can stay active, but power consumption increases and battery life decreases
Solution Approach 1:
The segmented power supply topology with separate power planes enables the CPU to be completely powered down during deep sleep states while the display subsystem continues operating on its dedicated power plane. This resolution directly reduces overall power consumption and extends battery life by allowing the CPU to enter its lowest power state regardless of display activity.
Data Source
AI summary
Power consumption and dissipation is reduced during active display of content from an internal display buffer using a power supply topology that powers a display subsystem separately from the other components of a CPU. The power supply topology enables a processor to enter a sleep state without disabling the active display of content. The processor enters a processor sleep state when the display buffer is full and the processor components are no longer needed. The processor exits the processor sleep state when the display buffer is empty and operates in conjunction with the display subsystem to fill the buffer with more content. The processor continues to enter and exit the processor sleep states as appropriate until active display ends.