Segmented R-DAC Capacitor Compensation for High-Frequency Linearity

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Solution Overview

Problem

Segmented R-DACs face challenges in maintaining linearity due to parasitic capacitances and signal-dependent current loads, which cause distortion, especially at high frequencies and varying input codes.

Innovation Solution

The introduction of discrete capacitors with controlled capacitance ratios and the use of replica DACs with mapping logic to stabilize the reference current, minimizing the impact of parasitic capacitances and variable current loads.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If segmented R-DACs use separate DACs for MSBs and LSBs to reduce the number of resistors, then area consumption is reduced, but linearity deteriorates due to parasitic capacitances and signal-dependent current loads

Engineering Contradiction:
Improvearea consumed by R-DACVSAvoidlinearity
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

Capacitors are introduced as intermediary elements to compensate for parasitic capacitances. Specifically, a first capacitor is coupled between the output of the first DAC and the output of the second DAC, and a second capacitor is coupled between the output of the second DAC and ground, with the second capacitor having a capacitance value that is a predetermined multiple (e.g., 2N-1 times) of the first capacitor. These capacitors act as mediators to cancel out the harmful parasitic effects and improve linearity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention changes the electrical parameters of the circuit by introducing capacitors with specifically designed capacitance values. The ratio of capacitance values between the second capacitor and first capacitor is set to a predetermined multiple (such as 2N-1) to optimize the compensation effect and achieve the desired linearity improvement while maintaining the segmented architecture benefits.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If segmented R-DACs operate at high frequencies to improve productivity, then conversion speed is improved, but linearity deteriorates due to increased impact of parasitic capacitances

Engineering Contradiction:
Improveconversion speedVSAvoidlinearity
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The capacitors serve as frequency-dependent intermediaries that become increasingly effective at higher frequencies. By coupling the first capacitor between the MSB DAC output and LSB DAC output, and the second capacitor from LSB DAC output to ground with appropriate capacitance ratios, the circuit compensates for parasitic effects that worsen with frequency, enabling high-speed operation while maintaining linearity.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If replica DACs with mapping logic are added to stabilize reference current, then linearity is improved, but device complexity increases

Engineering Contradiction:
ImprovelinearityVSAvoidcircuit complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

Replica DACs are introduced as simplified copies of the main DAC segments. These replica DACs replicate the essential functionality and parasitic characteristics of the MSB and LSB DACs, allowing them to generate compensation signals that stabilize the reference current. The mapping logic circuits translate the digital input codes into appropriate compensation codes for the replica DACs, achieving linearity improvement through current stabilization without requiring complete duplication of the complex DAC structures.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS10756744B1Linearity improvement for segmented R-DACs
Publication Date: 2020.08.25 APPLE INC
  • US10756744B1 patent drawing
  • US10756744B1 patent drawing
  • US10756744B1 patent drawing

AI summary

Various embodiments of a segmented R-DAC are disclosed. In one embodiment, a segmented R-DAC includes first and second DACs arranged to receive most and least significant bits, respectively. The segmented R-DAC also includes a first capacitor coupled between an output of the first DAC and an output of the second DAC, and a second capacitor coupled between the output of the second DAC and a ground node. The capacitance of the second capacitor has a value that is a predetermined multiple of the capacitance value of the first capacitor.