Segmented Ramp Voltage Programming for Flash Memory Verification

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Solution Overview

Problem

The existing programming operations in flash memory devices are time-consuming due to the need for a ramped voltage signal that covers the entire voltage range for each memory cell, leading to performance bottlenecks in memory systems.

Innovation Solution

The programming process is optimized by segmenting the ramped voltage signal into multiple segments, each covering a specific range of threshold voltages, allowing for incremental verification and programming, thereby reducing the overall programming time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a ramped voltage signal covering the entire voltage range is used for program verify operation, then the verification accuracy is improved, but the programming time increases significantly

Engineering Contradiction:
Improveverification accuracyVSAvoidprogramming time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent divides the program verify operation into multiple segments, each handling a specific voltage range. Instead of applying one comprehensive ramped voltage signal covering the entire voltage range, the system performs multiple targeted verify operations on segmented voltage ranges, significantly reducing the time required for each individual verify operation while maintaining overall verification accuracy.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the ramped voltage signal starts from the lowest threshold voltage and increases to the highest, then all memory cell states are verified, but the programming operation becomes a performance bottleneck

Engineering Contradiction:
Improvedata verification completenessVSAvoidmemory programming speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the voltage range into multiple sub-ranges and performs verify operations on each segment separately. This allows the system to verify all memory cell states across the full voltage range while avoiding the time penalty of a single comprehensive verify operation, thus resolving the bottleneck issue.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary verify operations on lower voltage ranges first, then progressively moves to higher voltage ranges. This staged approach allows early verification of commonly accessed data while preparing for subsequent verification of less frequently accessed higher voltage states, improving overall system responsiveness.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP2652742B1Methods for segmented programming and memory devices
Publication Date: 2018.12.26 MICRON TECHNOLOGY INC
  • EP2652742B1 patent drawingFigure 1
  • EP2652742B1 patent drawingFigure 2
  • EP2652742B1 patent drawingFigure 3

AI summary

Methods for segmented programming, program verify, and memory devices are disclosed. One such method for programming includes biasing memory cells with a programming voltage and program verifying the memory cells with a plurality of ramped voltage signal segments, wherein each ramped voltage signal segment has a different start voltage and a different end voltage than the other ramped voltage signal segments.