Segmented Ramp Generator Circuit With Low-Glitch Signal Linearity

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Solution Overview

Problem

Existing image sensor technologies face challenges in generating high-quality ramping signals, which are crucial for image sensing applications, due to issues like gain non-linearity and lost-bit effects caused by poor signal linearity and high glitch power, while also requiring low power consumption and a small physical area.

Innovation Solution

A system and method that utilize a series of storage circuits and current generating circuits to propagate an enable signal, generating a ramping signal by converting current signals into voltage signals through a load block, with the option of incorporating an offset segment to enhance signal resolution and reduce non-linearity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional ramp signal generation methods are used, then the circuit implementation is simple, but the signal linearity is poor causing gain non-linearity and lost-bit effects

Engineering Contradiction:
Improvesignal linearityVSAvoidcircuit complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The ramp signal generation is divided into multiple segments, each handled by a separate current generating circuit. Each circuit generates a portion of the ramp signal with controlled linearity, and the segments are combined to form the complete ramp signal. This segmentation allows each sub-circuit to be optimized for linearity while managing overall circuit complexity.

Inventive Principle:
Principle #1Segmentation

2Manufacturing precision

If high-quality ramping signals with improved linearity are generated, then gain non-linearity and lost-bit effects are reduced, but power consumption and physical area increase

Engineering Contradiction:
Improvesignal linearityVSAvoidpower consumption
Core Design Contradiction:
Manufacturing precisionVSUse of energy by moving object

Solution Approach 1:

The current generating circuits are activated periodically based on control signals, rather than continuously. The enable signal controls the timing of current generation, allowing the circuits to remain inactive during periods when ramp signal generation is not required. This periodic operation significantly reduces power consumption while maintaining signal linearity during active periods.

Inventive Principle:
Principle #19Periodic action

3Manufacturing precision

If high-quality ramping signals with improved linearity are generated, then gain non-linearity and lost-bit effects are reduced, but power consumption and physical area increase

Engineering Contradiction:
Improvesignal linearityVSAvoidphysical area
Core Design Contradiction:
Manufacturing precisionVSArea of stationary object

Solution Approach 1:

Multiple current generating circuits are merged into a single integrated structure that shares common components such as load blocks and control signal paths. The circuits are designed to operate in parallel but share infrastructure, reducing the total physical area required compared to completely separate implementations. This merging maintains the linearity benefits of multiple circuits while minimizing area overhead.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10992893B2Method and system for generating a ramping signal
Publication Date: 2021.04.27 CISTA SYST
  • US10992893B2 patent drawing
  • US10992893B2 patent drawing
  • US10992893B2 patent drawing

AI summary

A system is provided for generating a ramping signal. The system includes a plurality of storage circuits each including an input and an output. The output of a previous storage circuit is connected to the input of a next storage circuit. The storage circuits are configured to propagate a first enable signal based on a first control signal. The system also includes a plurality of first current generating circuits. Each first current generating circuit is coupled to the output of a corresponding storage circuit to receive the propagated first enable signal. The first current generating circuits are configured to generate a first current signal based on the propagated first enable signal.