Segmented Seal Ring Layout to Reduce Active Region Loss
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Solution Overview
Problem
Existing seal structures for multi-gate devices like FinFETs and MBC transistors are susceptible to damage from mist ingress and stress during singulation, and the removal of dummy gate stacks can lead to substantial loss of active regions, causing anomalies in the seal ring structures.
Innovation Solution
The implementation of seal structures with specific configurations in the ring region and inner corner areas, featuring aligned gate structures that do not cover large continuous areas of the active regions, reducing the likelihood of active region loss during dummy gate stack removal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If seal structures are implemented to protect semiconductor devices from mist ingress and stress during singulation, then reliability is improved, but the removal of dummy gate stacks can lead to substantial loss of active regions causing anomalies in the seal ring structures
Solution Approach 1:
The seal ring structure is divided into multiple discrete gate structures spaced apart from each other, rather than forming a continuous seal ring. This segmentation allows the dummy gate stacks to be removed without causing substantial loss of active regions, while still providing effective protection against mist ingress and stress during singulation.
Solution Approach 2:
The gate structures are positioned specifically in the ring region and inner corner areas, with different spacing configurations in different locations. The gate structures are aligned with the active regions and spaced to provide local protection where most needed while minimizing impact on active region retention during dummy gate stack removal.
2Device complexity
If dummy gate stacks are removed during manufacturing, then device complexity is reduced, but substantial loss of active regions occurs causing anomalies in the seal ring structures
Solution Approach 1:
By segmenting the seal ring into spaced-apart gate structures, the dummy gate stacks can be completely removed without causing substantial loss of active regions. The segmented configuration ensures that when dummy gates are removed, the remaining structure maintains structural integrity and does not develop anomalies.
3Reliability
If gate structures are configured to provide complete coverage for sealing, then protection effectiveness is improved, but active region loss increases during dummy gate stack removal
Solution Approach 1:
The gate structures are segmented and spaced apart rather than forming continuous coverage. This segmentation reduces active region loss during dummy gate stack removal while maintaining protection effectiveness through the distributed arrangement of gate structures in the ring region and inner corner areas.
Solution Approach 2:
Instead of providing complete continuous coverage, the patent uses partial coverage with spaced gate structures. This partial action approach is sufficient to provide effective protection against mist ingress and stress while minimizing the harmful effect of active region loss during manufacturing.
Data Source
AI summary
Integrated circuit (IC) chips are provided. An IC chip according to the present corner area between an outer corner of the device region and an inner corner of the ring region. The ring region includes a first active region extending along a first direction, a first source/drain contact disposed partially over the first active region and extending along the first direction, and first gate structures disposed completely over the first active region and each extending lengthwise along the first direction. The corner area includes a second active region extending along a second direction that forms an acute angle with the first direction, a second source/drain contact disposed partially over the second active region and extending along the second direction, and second gate structures disposed over the second active region and each extending along the first direction.