Segmented Signal Multiplexer Layout for Higher Data Rates

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Solution Overview

Problem

Conventional signal multiplexers face limitations in accelerating data rate due to high load capacity and restricted frequency band, resulting in a dull output waveform and restricted frequency band.

Innovation Solution

A signal multiplexer configuration that includes M number of front units and a rear unit, where the front units output signals based on control signal levels, and the rear unit combines these signals to produce an output with a different level when all front unit signals are the same, avoiding a single connecting point for all output ends, thus reducing load capacity and enhancing data rate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If one connecting point is used to connect all output ends of buffer sections, then device complexity is reduced, but load capacity becomes high causing waveform degradation and frequency band restriction

Engineering Contradiction:
Improveconnecting point configurationVSAvoidoutput waveform quality
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent divides the single connecting point into multiple connecting points (first connecting point and second connecting point). The output ends of buffer sections are segmented into two groups: odd-numbered buffer sections connect to the first connecting point, while even-numbered buffer sections connect to the second connecting point. This segmentation reduces the load capacity at each connecting point, preventing waveform degradation and frequency band restriction while maintaining device simplicity.

Inventive Principle:
Principle #1Segmentation

2Device complexity

If one connecting point is used to connect all output ends of buffer sections, then device complexity is reduced, but frequency band is restricted limiting data rate acceleration

Engineering Contradiction:
Improveconnecting point configurationVSAvoiddata rate
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The patent segments the output connections into multiple paths with separate connecting points. By dividing the buffer sections into two groups that connect to different connecting points, the load capacity at each point is reduced, allowing for better signal quality and extended frequency band. This enables higher data rates to be achieved without increasing overall device complexity.

Inventive Principle:
Principle #1Segmentation

3Reliability

If multiple connecting points are used to reduce load capacity, then output waveform quality improves, but device complexity increases

Engineering Contradiction:
Improveoutput waveform qualityVSAvoidconnecting point configuration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by making different connecting points serve different buffer sections based on their numbering (odd vs. even). Each connecting point is optimized for its specific group of buffer sections, reducing the local load capacity and improving waveform quality at each connection point while maintaining overall system simplicity through this systematic differentiation.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10333513B2Signal multiplexer
Publication Date: 2019.06.25 THINE ELECTRONICS
  • US10333513B2 patent drawing
  • US10333513B2 patent drawing
  • US10333513B2 patent drawing

AI summary

A signal multiplexer according to the present embodiment has a configuration sufficiently capable of accelerating a data rate. The signal multiplexer includes M number of front units and a rear unit. An m-th front unit Am outputs an output signal corresponding to an m-th input signal Im when both the control signal Cm and the control signal Cn are significant levels, and outputs an output signal having a fixed level when at least either one of the control signal Cm or the control signal Cn is an non-significant level. A rear unit B receives signals from the front units, and outputs a signal having a different signal level in a case in which all the output signals from the front units are the same level or in the other case.