Segmented Solder Bump for Fine Pitch Electrical Isolation
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Solution Overview
Problem
As semiconductor devices miniaturize, they face challenges with electrical shorts between adjacent solder joints in package-on-package (POP) structures, which affect the reliability of the solder joint connections.
Innovation Solution
The semiconductor device features a solder bump with a core portion and a peripheral portion, where the peripheral portion includes segments with different melting points, allowing for a reflow process at specific temperatures to form a joint structure with a fine pitch and reduced risk of electrical shorts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If semiconductor devices are miniaturized to increase functionality and reduce size, then device compactness and functionality are improved, but electrical shorts between adjacent solder joints occur more frequently
Solution Approach 1:
The solder joint is segmented into multiple functional portions: a first solder portion for electrical connection, a second solder portion extending upward, and a third solder portion forming a protective protrusion. This segmentation allows each portion to perform its specific function independently, maintaining reliability even as overall device size decreases and pitch between solder joints is reduced.
Solution Approach 2:
The solder joint structure extends in the vertical dimension with the second solder portion rising above the chip surface and the third portion forming a protective protrusion. This vertical dimensionality provides mechanical protection and electrical isolation without increasing the horizontal footprint, enabling finer pitch between adjacent solder joints while maintaining reliability.
2Length of moving object
If the pitch between solder joints is reduced to achieve finer connections, then device compactness is improved, but the risk of electrical shorts between adjacent solder joints increases
Solution Approach 1:
By extending the solder joint structure vertically with the second and third portions, the patent creates spatial separation between adjacent solder joints in the vertical dimension. This allows horizontal pitch to be reduced while the vertical protrusions maintain electrical isolation and prevent shorts between neighboring joints.
Solution Approach 2:
The third solder portion forms a protective protrusion that extends beyond the chip surface, creating a physical barrier before electrical shorts can occur between adjacent solder joints. This preemptive protective structure cushions against potential electrical interference and mechanical stress.
3Reliability
If additional protective components or processes are added to prevent electrical shorts, then solder joint reliability is improved, but device complexity and manufacturing steps increase
Solution Approach 1:
The protective function is merged directly into the solder joint structure itself through the second and third solder portions. Rather than adding separate protective components, the solder material forms both the electrical connection and the protective protrusion in a single integrated structure, simplifying the overall device architecture.
Solution Approach 2:
The multi-portion solder joint structure serves multiple functions simultaneously: the first portion provides electrical connection to the chip, the second portion provides vertical extension and spacing, and the third portion provides protective protrusion. This multi-functionality eliminates the need for separate protective components.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the reliability of solder joints by preventing electrical shorts and allowing for a finer pitch without the need for additional components or processes, improving contact margins and reducing the occurrence of electrical failures.
Implementation Method 1
performing a first reflow process at a first temperature greater than the second melting point and less than the first melting point so as to join the second material to the first material
Data Source
AI summary
A semiconductor device includes a package substrate, a semiconductor chip on a first region of the package substrate, and a solder bump on a second region of the package substrate. The solder bump includes a core portion and a peripheral portion encapsulating the core portion. The peripheral portion includes a first segment with a first melting point and a second segment with a second melting point that is less than the first melting point.