Power Module Circuit Board With Segmented Solder Thermal Vias

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Solution Overview

Problem

Existing power semiconductor modules face challenges in achieving effective heat dissipation while maintaining a reliable and long-term stable electrical and mechanical connection between the power semiconductor component and the circuit board, particularly in applications with stringent thermal requirements.

Innovation Solution

A circuit board design featuring thermal vias surrounded by a solder layer divided into separate regions with intermediate spaces, where the vias are metallized and covered by an insulating layer on the bottom side to prevent solder penetration and ensure uniform solder distribution, allowing for enhanced heat dissipation and secure bonding.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If thermal vias are provided to improve heat conduction, then heat dissipation is improved, but the risk of solder penetration into vias causing short circuits increases

Engineering Contradiction:
Improveheat dissipationVSAvoidelectrical insulation
Core Design Contradiction:
TemperatureVSReliability

Solution Approach 1:

The solder layer is segmented into multiple separate regions rather than a continuous layer. These regions are positioned to surround the upper openings of thermal vias, preventing solder from flowing into the vias during reflow while still providing adequate solder for component mounting. The segmentation creates physical separation between solder and via interiors, eliminating the short circuit risk while preserving heat dissipation functionality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Solder resist is applied as an intermediary barrier around the upper openings of thermal vias. This resist layer prevents solder from penetrating into the vias during the reflow process, acting as a protective intermediary between the solder and the via interiors. The resist is removed after soldering, leaving the via openings clear while having prevented unwanted solder infiltration during assembly.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Strength

If solder layer is continuous to ensure uniform bonding, then mechanical connection is improved, but solder penetration into vias during reflow increases

Engineering Contradiction:
Improvemechanical connectionVSAvoidsolder penetration
Core Design Contradiction:
StrengthVSObject-generated harmful factors

Solution Approach 1:

The solder layer is divided into discrete regions that are separated by intermediate spaces. Each region is positioned to surround the upper openings of thermal vias, providing localized solder for mounting while the segmentation prevents continuous solder flow into the vias during reflow. This segmented approach maintains adequate bonding strength at mounting locations while eliminating the harmful solder penetration effect.

Inventive Principle:
Principle #1Segmentation

3Temperature

If thermal vias are densely packed to maximize heat dissipation, then heat conduction is improved, but manufacturing complexity increases

Engineering Contradiction:
Improveheat dissipationVSAvoidvia arrangement
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

The solder layer segmentation creates a pattern that naturally accommodates thermal vias. By dividing the solder layer into separate regions surrounding via openings, the design enables dense via packing without requiring complex solder resist patterns or additional manufacturing steps. The segmented solder regions self-align with the via openings, simplifying the overall manufacturing process while maximizing heat dissipation capability.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design enables improved heat dissipation and uniform solder bonding, facilitating a reliable electrical and mechanical connection, suitable for high-thermal-demand applications like electromobility.

Implementation Method 1

The purpose of such bores, which are referred to as 'thermal vias', is not to establish electrical connections between metallization layers, but rather to improve heat conduction through the circuit board

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

Solder deposits are also provided in the mounting region. For installation, the power semiconductor component is placed onto the circuit board in the mounting region and is connected to the circuit board by the solder deposits in a reflow process

Methodology Applied
Scientific EffectSoldering: Soldering

Implementation Method 3

The vias can have a metallization, such as at least their walls are fully or partly covered with a metallic layer in order to improve thermal conductivity

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS12604391B2Circuit board for a power semiconductor module, power semiconductor module, and method for producing a circuit board and a power semiconductor module
Publication Date: 2026.04.14 VITESCO TECHNOLOGIES GMBH
  • US12604391B2 patent drawing
  • US12604391B2 patent drawing
  • US12604391B2 patent drawing

AI summary

A circuit board for a power semiconductor module, having at least one top side and one bottom side, wherein at least one mounting area for a power semiconductor component is provided on the top side, wherein on the mounting area, at least one solder layer is provided for connecting at least one power semiconductor component to the mounting area, which layer is divided into regions that are separated from one another by intermediate spaces, and wherein multiple thermal vias are provided in the circuit board and extend from the top side to the bottom side of the circuit board in the region of or near the mounting area, wherein each upper opening of the thermal vias is directly surrounded by a respective region of the solder layer and each lower opening of the vias is covered by a layer of electrically insulating material.