Partitioned Semiconductor Package Substrate for Large-Die Yield
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Solution Overview
Problem
The increasing complexity and cost of advanced semiconductor packaging, particularly for large-die ASICs, due to low production yield and warpage issues in package substrates, necessitate a cost-effective solution for improved reliability and design flexibility.
Innovation Solution
A semiconductor package using a partitioned substrate with physically separated and rearranged substrate parts, connected via conductive elements like micro-bumps or copper pillars, and adjoined with a gap filled by adhesive, allowing for heterogeneous or homogeneous substrates with varying thicknesses, to reduce warpage and production costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a large-die ASIC package substrate is used, then the package size can accommodate large dies, but the production yield decreases and cost increases
Solution Approach 1:
The package substrate is divided into multiple smaller substrate parts arranged in a side-by-side configuration. Each substrate part can be independently manufactured and assembled, avoiding the low yield associated with manufacturing large single-piece substrates. The substrate parts are connected through conductive elements to form a complete package substrate that accommodates large dies.
2Area of stationary object
If a large-die ASIC package substrate is used, then the package size can accommodate large dies, but the manufacturing cost increases
Solution Approach 1:
The package substrate is divided into multiple smaller substrate parts that can be manufactured using standard fabrication processes, avoiding the high cost associated with manufacturing large single-piece substrates. The segmented approach allows for better utilization of manufacturing capacity and reduced material waste.
Solution Approach 2:
Multiple smaller substrate parts are combined through adhesion and electrical connection to form a complete package substrate. This merging approach allows the package to achieve the required large area while maintaining cost-effectiveness through modular construction.
3Area of stationary object
If a large-die ASIC package substrate is used, then the package size can accommodate large dies, but warpage problems occur
Solution Approach 1:
The package substrate is divided into multiple smaller substrate parts, each with its own support structure. This segmentation reduces the overall warpage by distributing thermal and mechanical stresses across multiple smaller units rather than allowing stress to accumulate across a large single substrate.
Solution Approach 2:
Conductive elements and adhesive materials serve as intermediaries between substrate parts, providing mechanical coupling and stress distribution. These intermediary layers help accommodate differential expansion and contraction, reducing warpage in the overall package structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The partitioned substrate approach enhances reliability, design flexibility, and reduces production costs while addressing warpage issues, making it suitable for large-die semiconductor packages.
Implementation Method 1
the substrate parts are adjoined together by using an adhesive that fills into the gap
Implementation Method 2
the at least one integrated circuit die is electrically connected to the partitioned package substrate through a conductive elements
Implementation Method 3
solder balls mounted on a second surface of the partitioned package substrate
Data Source
AI summary
A semiconductor package includes a partitioned package substrate composed of substrate parts arranged in a side-by-side manner; an integrated circuit die mounted on a first surface of the partitioned package substrate; and solder balls mounted on a second surface of the partitioned package substrate opposite to the first surface.