Segmented Switching Circuit With Glitch Feedback Timing Control
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Solution Overview
Problem
Conventional segmented switching devices, such as DACs, suffer from noise-induced errors caused by glitches and differential nonlinearity (DNL) errors due to mistimed data transitions and external signal interference.
Innovation Solution
A glitch reduction apparatus comprising a latch, switching device segment unit, glitch detection unit, and voltage/current converter is employed, where the glitch detection unit, potentially a current mirror or comparator, detects glitches and generates a control signal to adjust the timing overlap of data segments through a negative feedback loop, reducing glitch occurrence and size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If segmented switching device is used to process digital signals, then processing capability is improved, but noise-induced errors and glitches occur
Solution Approach 1:
The switching device is divided into multiple segments that process different portions of the digital signal independently. Each segment handles a specific bit weight (e.g., MSB segment for most significant bits, LSB segment for least significant bits), allowing parallel processing while isolating error propagation. The segmented architecture processes data portions separately and recombines them, improving processing capability while maintaining signal accuracy through controlled segmentation.
Solution Approach 2:
A feedback mechanism is implemented where the output of each segment is monitored and adjusted based on the inputs from other segments. The feedback loop detects timing mismatches and signal transitions between segments, generating correction signals to synchronize the segments. This feedback control ensures that noise-induced errors and glitches are detected and corrected, maintaining high signal accuracy while preserving the parallel processing advantage.
2Speed
If data transitions are accelerated to improve processing speed, then productivity is improved, but mistimed transitions and glitches increase
Solution Approach 1:
The switching device prepares for data transitions in advance by pre-charging and pre-discharging the switching elements before the actual signal transition occurs. Control signals are generated ahead of time to synchronize the switching actions across segments, ensuring that even at high speeds, the transitions are properly timed. This preliminary preparation allows fast data transition speed while maintaining precise timing control to prevent glitches.
3Productivity
If multiple segments are used to process different data portions, then processing capability is improved, but differential nonlinearity errors occur
Solution Approach 1:
The switching device dynamically adjusts operating parameters such as switching thresholds, bias voltages, and timing delays for each segment based on the input signal characteristics. By changing these parameters adaptively, the device compensates for segment-to-segment variations and nonlinearity effects. This parameter optimization ensures that each segment operates in its optimal range, maintaining high processing capability while minimizing differential nonlinearity errors through real-time parameter adjustment.
Data Source
AI summary
Provided are an apparatus and method of reducing a glitch in a switching device. The apparatus includes a latch latching a digital input signal and providing a digital output signal, a switching device segment unit including at least two switching device segment units, each one of the at least two switching device segment units switching a portion of the digital signal output, a glitch detection unit detecting a glitch generated within the switching device segment unit; and a voltage/current converter generating a latch control signal in response to an output from the glitch detection unit associated with a detected glitch, the latch control signal controlling an overlap of the digital output signal to reduce the glitch.