Segmented TFT Output Stage for LCD Gate Driver Area Reduction
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Solution Overview
Problem
The existing liquid crystal display devices face challenges with amorphous silicon thin film transistors having low carrier mobility, unstable threshold voltage, and insufficient driving current, making it difficult to design gate driving circuits that can handle high frame rates and prevent color washout issues due to large load capacitors at the output terminals.
Innovation Solution
The liquid crystal display device incorporates a pixel driving circuit with four thin film transistors, where the gates of these transistors are coupled to the output terminal of a gate driving circuit, allowing them to output main and sharing signals with synchronized phases and timings, effectively reducing the size of the thin film transistor at the output terminal by dividing the load across multiple transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If a single thin film transistor is used at the output terminal of the gate driving circuit, then the device complexity is low, but the transistor size must be large to handle the large load capacitor, resulting in increased fabrication area and poor electrical characteristics
Solution Approach 1:
The patent divides the single large thin film transistor at the output terminal into multiple smaller thin film transistors (first thin film transistor and second thin film transistor). Each transistor handles a portion of the load, reducing the area required for each individual transistor while collectively maintaining the capability to drive the large load capacitor. This segmentation resolves the contradiction by trading device complexity (increasing transistor count) for reduced fabrication area.
2Ease of manufacture
If amorphous silicon thin film transistors are used to realize gate driver on array, then the manufacturing cost is reduced, but the electrical characteristics deteriorate due to low carrier mobility and unstable threshold voltage
Solution Approach 1:
The patent segments the output stage into multiple thin film transistors with gates coupled to the output terminal. This configuration allows the transistors to operate in parallel, effectively increasing the total driving current capability and improving electrical characteristics while maintaining the use of cost-effective amorphous silicon technology. The segmented architecture compensates for the inherent limitations of a-Si TFTs.
Solution Approach 2:
The thin film transistors at the output terminal serve multiple functions: they act as switches for the gate lines, provide current amplification, and share the load driving responsibility. This multi-functionality allows the system to achieve better electrical characteristics without requiring higher-performance (and more expensive) transistor materials.
3Reliability
If the gate driving circuit drives two gate lines and two sharing lines simultaneously, then the color washout problem is solved, but the load capacitor becomes large, making the circuit design difficult
Solution Approach 1:
The patent segments the load driving function across multiple thin film transistors that are coupled to the output terminal. This segmentation distributes the large load capacitor driving task among several transistors, reducing the individual transistor size requirements and simplifying the overall circuit design while maintaining the capability to drive multiple gate lines and sharing lines simultaneously for color washout prevention.
Data Source
AI summary
A liquid crystal display device includes a plurality of pixel driving circuits and a pixel array. Each pixel driving circuit of the plurality of pixel driving circuits includes four thin film transistors and has four output terminals, where each thin film transistor is used for driving an output terminal of the four output terminals, and the four output terminals are coupled to two gate lines and two sharing lines respectively for outputting two main output signals and two sharing output signals. The phases and timings of the two main output signals and the two sharing output signals are all the same. A pixel of the pixel array is charged/discharged to a specific voltage level according to a main output signal of the two main output signals, a sharing output signal, and a signal of a data line.