Segmented Underfill Package Structure for Corner Crack Resistance
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Solution Overview
Problem
As semiconductor devices become increasingly miniaturized and require high-capacity data processing, existing package structures face challenges in effectively protecting corner portions and substrate connection terminals from external impacts and thermal stresses, leading to potential cracks and reliability issues.
Innovation Solution
The proposed package structure incorporates a first underfill with higher thermal expansion and lower modulus of elasticity to absorb external shocks, covering corner portions and substrate connection terminals, while a second underfill with different properties covers the side surfaces of the semiconductor package, providing enhanced protection and reducing crack occurrence.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single uniform underfill is used between the lower substrate and semiconductor package, then the structure is simple and easy to manufacture, but it cannot effectively protect corner portions and substrate connection terminals from external impacts and thermal stresses
Solution Approach 1:
The underfill is divided into multiple segments with different properties: a first underfill with higher thermal expansion coefficient and lower modulus of elasticity applied at corner portions and substrate connection terminals for shock absorption, and a second underfill with different properties applied at side surfaces. This segmentation allows each region to be optimized for its specific protective function while maintaining overall structural integrity.
Solution Approach 2:
Different underfill materials with specific local properties are applied to different regions of the semiconductor package. The first underfill with higher thermal expansion and lower stiffness is specifically applied at corner portions and substrate connection terminals where impact protection is most critical, while the second underfill is applied at side surfaces, creating localized optimization of protective properties.
2Volume of moving object
If miniaturization is pursued to meet high-capacity data processing requirements, then device size is reduced, but protection against external impacts and thermal stresses becomes more difficult
Solution Approach 1:
The underfill materials are selected with specific parameter changes: the first underfill has a higher thermal expansion coefficient and lower modulus of elasticity compared to conventional underfills. These parameter changes enable the underfill to better absorb thermal stresses and mechanical impacts, providing enhanced protection for miniaturized devices where heat generation and impact resistance are critical.
Solution Approach 2:
The patent employs a composite underfill structure combining two different underfill materials with distinct properties. The first underfill (with higher thermal expansion and lower stiffness) and the second underfill work together in a composite arrangement, allowing the system to simultaneously achieve miniaturization and enhanced resistance to external impacts and thermal stresses through material property optimization.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively prevents and reduces the occurrence of cracks at corner portions and improves the reliability of semiconductor packages by absorbing external impacts and managing thermal stresses, ensuring the structural integrity and performance of miniaturized semiconductor devices.
Implementation Method 1
a first underfill with higher thermal expansion and lower modulus of elasticity to absorb external shocks
Implementation Method 2
a first underfill with higher thermal expansion and lower modulus of elasticity to absorb external shocks
Implementation Method 3
a second underfill between the lower substrate and the semiconductor package, the second underfill covering a side surface of the semiconductor package
Data Source
AI summary
A package structure includes a lower substrate, substrate connection terminals on the lower substrate, a semiconductor package on the substrate connection terminals, the semiconductor package including a package substrate and a first encapsulant covering the package substrate, first underfills between the lower substrate and the semiconductor package, the first underfills covering corner portions of the semiconductor package, as viewed in a plan view, and covering at least one of the substrate connection terminals, and a second underfill between the lower substrate and the semiconductor package, the second underfill covering a side surface of the semiconductor package in a plan view.


