Segmented Via Structures Preventing Void Formation

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Solution Overview

Problem

The scaling down of semiconductor devices leads to space and layout constraints, resulting in the formation of undesirable voids during fabrication, which increases electrical resistance and reduces the reliability of integrated circuit (IC) chips.

Innovation Solution

The implementation of via structures with an increased width-to-height ratio, made of the same material, to facilitate complete filling during deposition processes and prevent void formation, while also using conductive barrier liners to prevent atom diffusion and ensure electrical conduction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If device dimensions are reduced to increase density, then the number of interconnected devices per unit area increases, but the formation of undesirable voids occurs during fabrication

Engineering Contradiction:

Improvedevice densityVSAvoidvoid formation

Core Design Contradiction:

ProductivityVSManufacturing precision

Solution Approach 1:

The via structure is divided into multiple segments: a first via portion extending from the first interlayer dielectric to the first metal layer, and a second via portion extending from the second interlayer dielectric to the first metal layer. The via gap filler material is deposited in segments between these portions, allowing complete filling without voids while accommodating the reduced device dimensions

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The via structure incorporates a via gap filler material positioned laterally between the first and second via portions, rather than only vertically. This lateral dimension approach ensures complete filling of the via structure, preventing void formation while maintaining the reduced device footprint required for high density

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Productivity

If via structures have small aspect ratios with narrow width and elongated height, then device density increases, but defect occurrences increase during etching and deposition

Engineering Contradiction:

Improvedevice densityVSAvoiddefect occurrence

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The via structure is segmented into first and second via portions with a via gap filler between them. This segmentation allows each portion to have optimized dimensions, reducing the aspect ratio and preventing defects during etching and deposition while maintaining high device density

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The via structure parameters are changed by introducing the via gap filler material, which modifies the effective aspect ratio and width characteristics. This parameter change reduces defect occurrences during fabrication while preserving the narrow width and elongated height needed for high device density

Inventive Principle:

Principle #35Parameter changes

3Reliability

If via structures are completely filled with conductive material, then electrical resistance decreases, but void formation increases without proper structure design

Engineering Contradiction:

Improveelectrical performanceVSAvoidvoid formation

Core Design Contradiction:

ReliabilityVSManufacturing precision

Solution Approach 1:

The via structure is segmented into first and second via portions with a via gap filler between them. This segmentation enables complete filling with conductive material to achieve low electrical resistance, while the structured approach prevents void formation that would occur with simple single-step filling

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The via gap filler material acts as an intermediary between the first and second via portions. It facilitates complete filling of the via structure with conductive material, ensuring low electrical resistance while preventing void formation through its positioning and structural role

Inventive Principle:

Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the electrical performance and reliability of IC chips by preventing void formation and improving the yield of semiconductor devices.

Implementation Method 1

conductive barrier liners to prevent atom diffusion and ensure electrical conduction

Methodology Applied

Scientific EffectDiffusion barrier: Diffusion Barrier

Implementation Method 2

filling the openings with a conductive material to form a first via structure over the first metal layer and a contact structure over the third metal layer

Methodology Applied

Scientific EffectPhysical vapor deposition: Physical Vapour Deposition

Data Source

PatentUS11222844B2Via structures for use in semiconductor devices

Publication Date: 2022.01.11 GLOBALFOUNDRIES US INC

AI summary

The present disclosure relates generally to structures in semiconductor devices and methods of forming the same. The present disclosure provides a semiconductor device including a first device region and a second device region. The first device region includes a first metal layer, a first via structure over the first metal layer, a second via structure over the first via structure, and a second metal layer over the second via structure. The first via structure and the second via structure electrically couple the second metal layer to the first metal layer. The second device region includes a third metal layer, a contact structure over the third metal layer, a memory cell structure over the contact structure, and a fourth metal layer over the memory cell structure. The first via structure and the contact structure are made of the same material.