Segmented Voltage Charge Pump for Phase Change Memory Ripple Control
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Solution Overview
Problem
Voltage charge pump systems for phase change memory require high voltage with low ripple and high current capability over a wide range, which existing technologies fail to provide efficiently due to excessive ripple and large decoupling capacitance impacting chip size.
Innovation Solution
A voltage charge pump circuit with multiple boost capacitor segments, each controlled by a respective signal line of a boost delay structure, allowing individual timing and enablement to manage forward bias and ripple, reducing parasitic currents and improving efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If large filter capacitors are used to minimize ripple voltage, then ripple is reduced, but chip size increases significantly
Solution Approach 1:
The charge pump circuit is divided into multiple phases with separate pump capacitors (CP0, CP1, CP2, CP3) for each phase. This segmentation allows the circuit to achieve low ripple through multiphase operation without requiring large filter capacitors, as each phase contributes to ripple cancellation. The segmented approach also enables better current distribution and reduced stress on individual components.
2Productivity
If charge pump frequency is increased to provide higher current, then current capability improves, but voltage ripple increases
Solution Approach 1:
The circuit employs multiphase periodic action with four distinct phases (PH0, PH1, PH2, PH3), each controlled by non-overlapping clock signals. This periodic multiphase operation allows the charge pump to deliver high current while maintaining low ripple, as the staggered switching of pump capacitors across phases creates a smoothing effect that cancels ripple components.
3Object-affected harmful factors
If decoupling capacitance is increased to reduce ripple, then ripple voltage decreases, but it consumes 50% of total pump area
Solution Approach 1:
The charge pump circuit provides its own ripple filtering function through the inherent multiphase operation and the interaction between multiple pump capacitors. Each pump capacitor serves dual purposes: charge transfer and ripple reduction. This self-service approach eliminates the need for separate large decoupling capacitors, as the pump structure itself performs the filtering function.
4Measurement precision
If regulator circuit is used to control charge pump output voltage, then voltage regulation improves, but excess charge and potential fall increase ripple
Solution Approach 1:
The circuit incorporates preliminary voltage regulation through the controlled charging phases before the main boost operation. The pump capacitors are pre-charged to specific voltages in controlled phases, and the non-overlapping clock signals ensure that charging and discharging operations are coordinated to prevent excessive voltage excursions. This preliminary control reduces the burden on downstream regulators and minimizes ripple generation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution reduces ripple and improves efficiency by allowing precise regulation of output current and voltage, avoiding latch-up issues and minimizing chip size through adjustable timing and enablement of boost capacitor segments.
Implementation Method 1
a first pump capacitor (CP0) coupled to a first signal line (CN0), a second pump capacitor (CP1) coupled to a second signal line (CN1), a third pump capacitor (CP2) coupled to a third signal line (CN2), and a fourth pump capacitor (CP3) coupled to a fourth signal line (CN3)
Data Source
AI summary
A voltage charge pump circuit with boost capacitor segments and boost delay chain structures are provided. The voltage charge pump circuit comprising a plurality of boost capacitor segments each of which is individually controlled by a respective signal line of a boost delay chain structure.