Segmented Wiring Structure for High I/O Semiconductor Packages
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The increasing number of input/output (I/O) connections in semiconductor chips leads to thicker semiconductor substrates, resulting in decreased yield and higher manufacturing costs due to the need for more dielectric and circuit layers, which complicates the manufacturing process.
Innovation Solution
A wiring structure comprising an upper conductive structure, a lower conductive structure, and an adhesion layer, where the upper conductive structure includes dielectric and circuit layers with fine pitch and high yield, and the lower conductive structure includes thicker dielectric and circuit layers with lower manufacturing costs, bonded together to achieve a compromise between yield and cost, with outer vias extending through the upper conductive structure and adhesion layer for electrical connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the number of dielectric and circuit layers is increased to accommodate more I/O connections, then the I/O connection capacity is improved, but the substrate thickness increases and manufacturing yield decreases
Solution Approach 1:
The patent divides the substrate into an upper conductive structure and a lower conductive structure, each with their own dielectric and circuit layers. These two structures are then bonded together through an adhesion layer, allowing the I/O connections to be distributed across both structures without requiring a single thick substrate, thereby maintaining manufacturing yield while achieving high I/O capacity
Solution Approach 2:
The upper conductive structure is positioned over and bonded to the lower conductive structure, with outer vias extending through the upper structure and adhesion layer to connect to circuit layers in the lower structure. This nested arrangement allows multiple functional layers to be integrated in a compact vertical configuration, increasing I/O capacity without proportionally increasing overall substrate thickness
2Adaptability or versatility
If the number of dielectric and circuit layers is increased to accommodate more I/O connections, then the I/O connection capacity is improved, but the substrate thickness increases
Solution Approach 1:
By segmenting the substrate into upper and lower conductive structures with separate dielectric and circuit layers, the patent enables I/O connections to be achieved through bonding of two thinner structures rather than creating one thick structure, thus increasing I/O capacity without proportionally increasing substrate thickness
Solution Approach 2:
The patent utilizes the vertical dimension by stacking the upper conductive structure over the lower conductive structure and using outer vias that extend through multiple layers. This three-dimensional arrangement allows increased I/O capacity by utilizing vertical space rather than only horizontal expansion, thereby achieving high I/O counts with controlled substrate thickness
3Adaptability or versatility
If more dielectric and circuit layers are added to increase I/O connections, then the I/O connection capacity is improved, but the manufacturing process complexity increases
Solution Approach 1:
The manufacturing process is segmented into separate steps for forming the upper conductive structure and lower conductive structure, which can be processed independently before bonding. This segmentation allows each structure to be optimized and manufactured separately, reducing the overall process complexity compared to creating a single multi-layer structure with all layers simultaneously
Solution Approach 2:
The upper and lower conductive structures are formed and prepared in advance before being bonded together. This preliminary action allows each structure to be fully processed, tested, and prepared independently, simplifying the overall manufacturing process by breaking down the complex multi-layer formation into manageable sequential steps
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves the yield of the wiring structure while maintaining a relatively low thickness, allowing for efficient manufacturing of semiconductor packages with high I/O counts by testing and bonding known good structures, thus optimizing the balance between yield and cost.
Implementation Method 1
The adhesion layer is interposed between the upper conductive structure and the lower conductive structure to bond the upper conductive structure and the lower conductive structure together
Data Source
AI summary
A wiring structure includes an upper conductive structure, a lower conductive structure, an adhesion layer and at least one outer via. The upper conductive structure includes at least one dielectric layer and at least one circuit layer in contact with the dielectric layer. The lower conductive structure includes at least one dielectric layer and at least one circuit layer in contact with the dielectric layer. The adhesion layer is interposed between the upper conductive structure and the lower conductive structure to bond the upper conductive structure and the lower conductive structure together. The outer via extends through at least a portion of the upper conductive structure and the adhesion layer, and electrically connected to the circuit layer of the lower conductive structure.


