Segregated Control and Data Plane Architecture for Scalable Storage

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Solution Overview

Problem

Conventional data storage architectures using general purpose microprocessors face performance sub-optimality in executing data plane functions and are difficult to scale due to tight coupling between media and compute elements, leading to reduced system efficiency across varying workloads, especially in hyper-scale computing environments where workloads and data volumes can increase exponentially.

Innovation Solution

Implementing a segregated control plane and data plane architecture where data plane and control plane functions are executed on different hardware processors, leveraging optimized processors and distributed processing to enable efficient, scalable storage solutions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If general purpose microprocessors are used to run integrated storage control plane and data plane architectures, then system integration is simplified, but performance in executing data plane functions deteriorates

Engineering Contradiction:

Improvesystem integrationVSAvoiddata plane function execution performance

Core Design Contradiction:

Device complexityVSProductivity

Solution Approach 1:

The patent segments the storage system into separate control plane functions and data plane functions, executing them on different hardware processors. This segmentation allows each processor type to be optimized for its specific function, resolving the contradiction between integration simplicity and execution performance.

Inventive Principle:

Principle #1Segmentation

2Device complexity

If integrated control and data plane architectures are used, then system structure is simplified, but scaling capability deteriorates due to tight coupling between media and compute elements

Engineering Contradiction:

Improvesystem structureVSAvoidscaling capability

Core Design Contradiction:

Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent separates control plane and data plane functions onto different hardware processors, breaking the tight coupling between media and compute elements. This enables independent scaling of storage capacity and compute resources, resolving the contradiction between structural simplicity and scaling capability.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces a new architectural dimension by separating control and data planes across different hardware processors, enabling scaling in multiple independent dimensions (storage capacity, compute power, I/O bandwidth) rather than being constrained by a fixed compute-to-media ratio.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

3Quantity of substance

If system scale out is implemented with shared system information, then system capacity increases, but resource consumption (memory bandwidth, CPU cycles, I/O bandwidth) increases exponentially

Engineering Contradiction:

Improvesystem capacityVSAvoidresource consumption

Core Design Contradiction:

Quantity of substanceVSUse of energy by moving object

Solution Approach 1:

The patent extracts control plane functions from data plane functions and executes them on separate hardware processors. This extraction reduces the resource consumption of data plane operations by eliminating the overhead of shared system information management, allowing system capacity to scale without exponential resource consumption increases.

Inventive Principle:

Principle #2Taking out (Extraction)

4Adaptability or versatility

If general purpose microprocessors are used, then hardware versatility is improved, but execution efficiency for specific data plane functions deteriorates

Engineering Contradiction:

Improvehardware versatilityVSAvoidexecution efficiency

Core Design Contradiction:

Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent applies local quality by using different hardware processors optimized for specific functions: control plane functions run on general purpose processors while data plane functions run on specialized hardware processors. This resolves the contradiction by making each part of the system have the quality needed for its specific purpose.

Inventive Principle:

Principle #3Local quality

Data Source

PatentUS9575689B2Data storage system having segregated control plane and/or segregated data plane architecture

Publication Date: 2017.02.21 EMC IP HLDG CO LLC

AI summary

Data storage systems are provided having a segregated control plane architecture, a segregated data plane architecture, or a segregated control plane and segregated data plane architecture. For example, a data storage system includes a plurality of media nodes and a plurality of data nodes coupled to the media nodes. The media nodes control and manage persistent storage elements. Each data node includes at least one hardware processor configured to execute data plane functions and control plane functions, wherein at least one of (i) the data plane functions of a given one of the data nodes are segregated and executed by different hardware processors and (ii) the control plane functions of a given one of the data nodes are segregated and executed by different hardware processors.