Select Gate Electrode Layout Without Extra Photomask Steps
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Solution Overview
Problem
The production of semiconductor integrated circuit devices with separately controllable first and second select gate electrodes requires an additional dedicated photomask process, increasing production costs due to the complex configuration of memory cells in a matrix layout.
Innovation Solution
The method involves forming a surrounding conductive layer in the memory circuit region to separate the first and second select gate electrodes electrically, allowing for separate control without the need for an extra dedicated photomask process, thereby reducing production costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a dedicated photomask process is used to form separately controllable first and second select gate electrodes in memory cells, then the select gate electrodes can be independently controlled, but the production cost increases due to the additional process step
Solution Approach 1:
The conductive layer is segmented into first select gate electrodes and second select gate electrodes through selective removal in different regions. In the memory circuit region, the conductive layer is divided into separate first and second select gate electrodes, while in the logic circuit region, it remains as a unified logic gate electrode. This segmentation enables separate control of select gates without requiring an additional dedicated photomask process.
Solution Approach 2:
A single photomask process is designed to serve multiple functions: it forms both the logic gate electrodes in the logic circuit region and the select gate electrodes in the memory circuit region simultaneously. The conductive layer is processed in a unified manner to create different gate structures depending on the circuit region, eliminating the need for separate dedicated photomask processes for memory and logic circuits.
2Adaptability or versatility
If memory cells are disposed in a matrix with separately controllable select gate electrodes, then individual cell control is achieved, but the fabrication process complexity increases
Solution Approach 1:
The conductive layer undergoes different treatments in different spatial regions: in the memory circuit region, it is selectively removed to form separate first and second select gate electrodes, while in the logic circuit region, it is retained as a continuous logic gate electrode. This local differentiation achieves individual cell control where needed without complicating the overall fabrication process.
Solution Approach 2:
The solution moves from considering separate photomask processes for different circuit types to a unified photomask process that creates different structures through selective processing in different regions. By adding the dimension of spatially selective processing to a single photomask step, the patent achieves complex functionality without increasing process count.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of separately controllable select gate electrodes within the semiconductor integrated circuit device without the additional photomask step, thereby reducing production costs and simplifying the fabrication process.
Implementation Method 1
charge is injected into the charge storage layer by a quantum tunneling effect due to a voltage difference between the bit voltage and the memory gate voltage
Data Source
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Figure 3~4
AI summary
A method for producing a semiconductor integrated circuit device, and a semiconductor integrated circuit device are disclosed. In the method, during a photomask process of forming a logic gate electrode (G5, G6) in a peripheral circuit region (ER2), a surrounding conductive layer (Ga, Gb) in a memory circuit region (ER1) is divided into a first select gate electrode (G2a, G2b) and a second select gate electrode (G3a, G3b) electrically separated from each other. Thus, even when the first select gate electrode (G2a, G2b) and the second select gate electrode (G3a, G3b) are formed to be separately controllable, it is not necessary to perform an extra dedicated photomask process of fabricating only the memory circuit region (ER1), in addition to a conventional dedicated photomask process of fabricating only the memory circuit region, thereby production cost is reduced.