Select Gate Reliability in NAND Memory

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing memory sub-systems face reliability issues due to voltage drift and physical degradation of select gates in replacement-gate NAND architectures, leading to increased latency and decreased quality of service, as current approaches fail to account for process variations and workload-induced degradation.

Innovation Solution

Assigning a select gate reliability rank based on threshold voltage values to determine which data can be programmed to respective memory strings, thereby slowing down physical degradation and reducing degradation-related failures, using flags, bit patterns, or markers to monitor and manage select gate health.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If select gates are used in replacement-gate NAND architectures, then data storage capability is improved, but voltage drift and physical degradation occur leading to reliability issues

Engineering Contradiction:
Improveselect gate reliabilityVSAvoidvoltage stability
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The patent performs preliminary characterization of select gates during manufacturing to determine their initial threshold voltages and degradation rates. This advance information is stored and used to predict future threshold voltages, allowing the system to proactively manage select gates before degradation causes failures, thereby resolving the contradiction between reliability and voltage stability.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If data is programmed to memory strings without considering select gate health, then programming speed is improved, but degradation-related failures increase

Engineering Contradiction:
Improvedata programming speedVSAvoidend-of-life reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies local quality by differentiating management strategies for individual select gates based on their specific degradation characteristics. Each select gate is assigned a health status and managed differently - some may have reduced programming throughput assigned while others maintain full throughput. This localized approach allows the system to maintain high overall productivity while protecting against failures in specific degraded select gates.

Inventive Principle:
Principle #3Local quality

3Device complexity

If uniform data distribution is applied to all memory strings, then system simplicity is maintained, but process variations and workload-induced degradation are not accounted for

Engineering Contradiction:
Improvedata management complexityVSAvoidquality of service
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent segments the memory system into groups of memory strings based on select gate health status. Instead of treating all memory strings uniformly, the system creates distinct segments with different characteristics and manages data distribution differently for each segment. This segmentation enables the system to account for process variations and degradation while maintaining manageable complexity through systematic grouping rather than individual management of each select gate.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11875865B2Select gate reliability
Publication Date: 2024.01.16 MICRON TECHNOLOGY INC
  • US11875865B2 patent drawing
  • US11875865B2 patent drawing
  • US11875865B2 patent drawing

AI summary

A method includes determining a programmed threshold voltage for a select gate of a memory string and assigning the select gate a programmed reliability rank based upon the programmed threshold voltage. The programmed reliability rank indicates that hot data, warm data, and/or or cold data are programmable to the memory string. The method further includes incrementing a quality characteristic count to a first check voltage value, determining a first checked threshold voltage for the select gate at the first check voltage value, and assigning the select gate a first reliability rank based upon the first checked threshold voltage. The first reliability rank indicates that the warm data or the cold data, or both, are programmable to the memory string.