Selectable DFE Receiver Modes for PAM4 ISI Mitigation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing digital logic circuits face challenges in efficiently handling intersymbol interference (ISI) in high-speed communication systems, particularly when using PAM4 modulation and decision feedback equalization (DFE), which can be costly and power inefficient, with reduced-tap DFEs struggling to handle complex ISI scenarios.

Innovation Solution

A DFE receiver that can selectively operate in 1-tap or 2-tap DFE modes, using a common set of sampling latches and adjustable thresholds to resolve symbols based on different inputs, allowing flexible equalization without significant power changes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If 2-tap DFE mode is used to handle complex ISI scenarios, then intersymbol interference mitigation is improved, but power consumption increases

Engineering Contradiction:
ImproveISI mitigation capabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The system dynamically switches between 1-tap and 2-tap DFE modes based on the complexity of ISI conditions. The controller monitors channel conditions and selects the appropriate equalization mode, allowing the system to adapt between power efficiency (1-tap mode for simple channels) and interference mitigation capability (2-tap mode for complex channels), directly resolving the contradiction between reliability and power consumption

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes the operational parameters of the DFE receiver by switching between different tap configurations (1-tap vs 2-tap). This parameter change allows the system to adjust its equalization complexity according to channel conditions, achieving the desired balance between ISI handling capability and power consumption without requiring hardware redesign

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If full-tap DFE is used to maximize equalization performance, then symbol detection accuracy is improved, but device complexity increases

Engineering Contradiction:
Improvesymbol detection accuracyVSAvoidequalization circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The DFE equalization function is segmented into two distinct modes (1-tap and 2-tap) that can be selectively activated. This segmentation allows the system to use minimal complexity (1-tap) when sufficient, and only deploy full complexity (2-tap) when necessary for complex ISI scenarios, thereby reducing overall device complexity while maintaining high detection accuracy when needed

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The DFE receiver is designed with multi-functionality to handle both simple and complex ISI conditions using the same hardware structure. By implementing selectable tap configurations, the circuit serves multiple equalization needs without requiring separate dedicated circuits for each mode, thus improving symbol detection accuracy across diverse channel conditions while avoiding excessive device complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Device complexity

If reduced-tap DFE is used to reduce complexity, then device complexity is reduced, but ISI handling capability deteriorates

Engineering Contradiction:
Improveequalization circuit complexityVSAvoidISI handling capability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The system employs dynamic mode switching to adapt the equalization tap configuration based on real-time channel conditions. When ISI is minimal, the system operates in 1-tap mode for low complexity; when complex ISI is detected, it transitions to 2-tap mode to restore ISI handling capability, thus dynamically balancing complexity reduction with reliability maintenance

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20260039515A1Interface having selectable equalization modes
Publication Date: 2026.02.05 MICRON TECHNOLOGY INC
  • US20260039515A1 patent drawing
  • US20260039515A1 patent drawing
  • US20260039515A1 patent drawing

AI summary

Various embodiments of the present disclosure relate to apparatuses and methods for interfaces capable of switching between different equalization modes, such as Decision Feedback Equalization (DFE). An interface circuitry can include a DFE receiver that can selectively receive different control signals, which are utilized in resolving symbols in different equalization modes.