Selectable Die-to-Die Routing for Precision and Scalable Packaging

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Solution Overview

Problem

Current integrated circuit (IC) manufacturing techniques face challenges in efficiently interconnecting multiple dies with high resolution and critical dimension accuracy, particularly in multi-chip modules (MCMs) where die-to-die routing is limited by the need for precise patterning and bonding methods.

Innovation Solution

The implementation of monolithic and external die-to-die interconnection methods, including chip-level die-to-die routing and package-level die-to-die routing, using selection devices like multiplexers and demultiplexers, and through-silicon vias (TSVs), which allow for flexible routing configurations and connections within and between dies.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If traditional stepper-based patterning is used for die-to-die routing, then manufacturing precision is maintained, but device complexity and manufacturing time increase due to sequential processing

Engineering Contradiction:

Improvecritical dimension accuracyVSAvoidmanufacturing time

Core Design Contradiction:

Manufacturing precisionVSProductivity

Solution Approach 1:

The patent segments the interconnection system into two distinct routing modes: monolithic chip-level routing implemented during wafer fabrication, and external package-level routing implemented after die singulation. This segmentation allows each mode to be optimized independently - monolithic routing achieves high precision through standard stepper processes, while external routing provides flexibility for post-fabrication reconfiguration, thereby resolving the contradiction between precision and productivity.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces dynamic reconfigurability through selection devices (multiplexers/demultiplexers) that enable the interconnection system to switch between monolithic and external routing modes based on yield requirements and application needs. This dynamic capability allows the system to adapt to different manufacturing scenarios, improving overall productivity without sacrificing precision when monolithic routing is used.

Inventive Principle:

Principle #15Dynamics

2Productivity

If monolithic chip-level die-to-die routing is implemented, then manufacturing time is reduced through integrated processing, but adaptability decreases due to fixed routing configurations

Engineering Contradiction:

Improvemanufacturing timeVSAvoidrouting configuration flexibility

Core Design Contradiction:

ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent creates a universal interconnection system that can function in multiple modes: monolithic routing for high-volume production, external routing for reconfigurable applications, or a combination of both. The selection devices enable the same physical infrastructure to serve different routing paradigms, providing universality that resolves the contradiction between manufacturing efficiency and adaptability.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

By incorporating selection devices that enable dynamic switching between monolithic and external routing modes, the system gains adaptability without sacrificing manufacturing efficiency. The dynamic reconfiguration capability allows the system to optimize for speed when using monolithic routing, while retaining the option to reconfigure for specialized applications using external routing paths.

Inventive Principle:

Principle #15Dynamics

3Adaptability or versatility

If external package-level die-to-die routing is used, then adaptability is improved for reconfigurable systems, but device complexity increases due to separate bonding and routing processes

Engineering Contradiction:

Improvereconfiguration capabilityVSAvoidinterconnection structure

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the interconnection functionality into monolithic routing components integrated during fabrication and external routing components implemented during packaging. This segmentation isolates the complexity of external routing to only those systems that require it, while allowing simpler monolithic routing to be used in high-volume applications, thereby managing device complexity while maintaining adaptability where needed.

Inventive Principle:

Principle #1Segmentation

4Adaptability or versatility

If redundant die-to-die routing layouts are designed, then adaptability is improved for yield management, but device complexity increases due to additional routing structures

Engineering Contradiction:

Improveyield optimization flexibilityVSAvoidrouting layout

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements dynamic yield management through selection devices that can activate or deactivate specific routing paths based on die quality and yield requirements. The redundant routing layouts are not permanently active but can be dynamically engaged when needed, providing yield optimization flexibility without permanently increasing the operational complexity of the routing system.

Inventive Principle:

Principle #15Dynamics

Data Source

PatentUS11862557B2Selectable monolithic or external scalable die-to-die interconnection system methodology

Publication Date: 2024.01.02 APPLE INC

AI summary

Multi-die structures and methods of fabrication are described. In an embodiment, a multi-die structure includes a first die, a second die, and die-to-die routing connecting the first die to the second die. The die-to-die interconnection may be monolithically integrated as a chip-level die-to-die routing, or external package-level die-to-die routing.