Selection Pattern Barrier Portions for Leakage Current Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current memory devices with vertically stacked cross-point array structures face challenges in reducing leakage currents, which can lead to switching failures and operation failures during writing and reading processes.
Innovation Solution
The implementation of a memory device design where a first and second barrier portion is formed adjacent to the sidewall of the selection pattern, creating a potential well at the central portion to direct current flow and reduce leakage currents, thereby enhancing selection accuracy and device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If vertically stacked cross-point array structures are used for high integration, then device density is improved, but leakage currents increase causing switching and operation failures
Solution Approach 1:
The selection pattern is divided into multiple segments along its sidewall, with each segment separated by barrier portions. This segmentation creates discrete current flow paths through each selection pattern segment, preventing uncontrolled leakage currents while maintaining the vertically stacked cross-point array structure for high device density
Solution Approach 2:
Barrier portions are strategically positioned at specific locations along the sidewall of the selection pattern to create localized potential barriers. These barrier portions modify the electrical properties only in specific regions where needed, creating potential wells that guide current flow through intended paths while blocking leakage paths, thus improving switching operation reliability without compromising overall device density
2Measurement precision
If selection accuracy is improved by adding barrier portions, then leakage currents are reduced, but device structure becomes more complex
Solution Approach 1:
The barrier portions are integrated directly with the sidewall of the selection pattern, merging the selection structure and barrier structure into a unified configuration. This combining approach achieves improved selection accuracy through the potential well effect while avoiding the need for separate, additional components that would increase device complexity
Solution Approach 2:
The barrier portions are positioned within and along the sidewall of the selection pattern, creating a nested structure where the barrier is embedded within the overall selection pattern geometry. This nesting allows the barrier functionality to be incorporated into the existing selection structure without adding significant external complexity to the device
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively decreases leakage currents, improves selection accuracy, and reduces the likelihood of switching and operation failures, ensuring precise writing and reading operations in memory devices with stacked cross-point array structures.
Implementation Method 1
creating a potential well at the central portion to direct current flow and reduce leakage currents
Data Source
AI summary
A plurality of first conductive patterns is disposed on a substrate. Each of the plurality of first conductive patterns extends in a first direction. A first selection pattern is disposed on each of the plurality of first conductive patterns. A first barrier portion surrounds the first selection pattern. A first electrode and a first variable resistance pattern are disposed on the first selection pattern. A plurality of second conductive patterns is disposed on the first variable resistance pattern. Each of the plurality of second conductive patterns extends in a second direction crossing the first direction.