Selective Airgap Regions in Semiconductor Substrates
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Solution Overview
Problem
Heteroepitaxial growth of direct bandgap compound semiconductors on silicon substrates is hindered by material property incompatibilities, leading to defects due to differing lattice constants and thermal expansion coefficients, which complicates the manufacturing of high-performance microelectronic and photonic devices.
Innovation Solution
The introduction of selective airgap regions in the substrate, allowing for elastic deformation of the first semiconductor layer to mitigate strain and reduce defect formation in the second semiconductor layer grown heteroepitaxially, without the need for wafer bonding or other limiting processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If heteroepitaxial growth is performed on silicon substrates, then device functionality is achieved, but defect formation increases due to material property incompatibilities
Solution Approach 1:
The substrate surface is segmented into contact regions and airgap regions. The airgap regions divide the substrate into isolated islands, allowing selective areas to accommodate thermal expansion differences while maintaining heteroepitaxial growth functionality in designated regions.
Solution Approach 2:
Airgap regions serve as intermediary elements between the silicon substrate and the overlying semiconductor layers. These airgaps act as stress-relief mediators that accommodate lattice mismatch and thermal expansion differences without requiring wafer bonding or complex intermediate buffer layers.
2Reliability
If wafer bonding is used to join device layers, then defect formation is reduced, but fabrication cost and process complexity increase
Solution Approach 1:
The airgap regions extract the stress accumulation problem from the continuous substrate structure. By removing material to create voids beneath the semiconductor layers, the patent eliminates the need for wafer bonding while maintaining defect reduction benefits.
Solution Approach 2:
The patent changes the physical state of the substrate-substrate interface from solid-contact to air-gap. This parameter change allows the system to accommodate thermal expansion differences through air cushioning rather than requiring bonded interfaces.
3Reliability
If functional layers are limited to critical thickness, then defect formation is mitigated, but device performance is compromised
Solution Approach 1:
The patent introduces a vertical dimension solution by creating airgaps beneath the semiconductor layers. This allows functional layers to grow beyond critical thickness in the vertical direction while the airgaps absorb stress, preventing defect propagation.
Solution Approach 2:
The airgap structure provides dynamic stress relief during thermal cycling and layer growth. The unsupported portions of the substrate can deform elastically to accommodate expansion differences, allowing thicker functional layers without defect formation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively minimizes defect formation and propagation in the second semiconductor layer, enhancing the reliability and performance of heteroepitaxially grown devices by concentrating stress on the first semiconductor layer, thereby improving the yield and functionality of microelectronic and photonic devices.
Implementation Method 1
The first semiconductor layer may be elastic enough, due to the selective air gap region, to allow elastic deformation caused by the heteroepitaxial (i.e. monolithic) growth of the second semiconductor layer
Data Source
AI summary
Examples herein relate to devices having substrates with selective airgap regions for mitigating defects resulting from heteroepitaxial growth of device materials. An example device may include a first semiconductor layer disposed on a substrate. The first semiconductor layer may have a window cut through a face, where etching a selective airgap region on the substrate is enabled via the window. A second semiconductor layer may be heteroepitaxially grown on the face of the first semiconductor layer so that at least a portion of the second semiconductor layer is aligned over the selective air gap region.