Selective Dielectric Barrier and Aluminum Etch Stop Layers

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Solution Overview

Problem

Resistance capacitance (RC) delay is a significant challenge in scaling copper interconnects beyond 14 nm technology nodes due to high-k barrier layer materials increasing capacitance, and thin high-selectivity etch stop layers are prone to oxidation, affecting reliability and etch selectivity.

Innovation Solution

The method involves selectively depositing a barrier layer with greater thickness on metal surfaces than on dielectric surfaces using chemical precursors and atomic layer deposition, and depositing an aluminum etch stop layer via physical vapor deposition, followed by transferring the substrate to a chemical vapor deposition chamber to form a thinner, more reliable interconnect structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a thick barrier film is used to meet etch stop and reliability parameters, then etch stop capability is improved, but overall capacitance of the interconnect increases

Engineering Contradiction:
Improveetch stop capabilityVSAvoidcapacitance
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The barrier system is segmented into two distinct layers: a thin etch stop layer (ESL) made of aluminum nitride with high etch selectivity, and a thicker dielectric barrier layer made of silicon carbon nitride. This segmentation allows the ESL to provide etch stop capability while the dielectric barrier layer provides copper diffusion barrier properties, thereby reducing overall capacitance while meeting reliability requirements.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention uses a composite structure combining aluminum nitride (high-k material with excellent etch selectivity) and silicon carbon nitride (dielectric material with copper barrier properties). This composite approach allows each layer to perform its specific function optimally, achieving both etch stop capability and low capacitance in the same interconnect structure.

Inventive Principle:
Principle #40Composite materials

2Object-generated harmful factors

If a thin, high-selectivity etch stop layer is used to reduce capacitance, then capacitance is reduced, but the layer is easily oxidized leading to lower etch selectivity and degradation in reliability

Engineering Contradiction:
ImprovecapacitanceVSAvoidetch selectivity and reliability performance
Core Design Contradiction:
Object-generated harmful factorsVSReliability

Solution Approach 1:

The etch stop layer is deposited first as a preliminary layer before the dielectric barrier layer. This preliminary action establishes the etch stop functionality early in the process, and the subsequent dielectric barrier layer serves as a protective overlayer that prevents oxidation of the thin ESL, thereby maintaining its etch selectivity and reliability performance.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The dielectric barrier layer acts as an intermediary protective layer between the thin etch stop layer and the external environment (oxygen). This intermediary layer prevents oxygen from reaching and oxidizing the ESL, thereby preserving the ESL's high etch selectivity and reliability without requiring the ESL itself to be thick or inherently oxidation-resistant.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If the dielectric barrier layer and etch stop layer are deposited separately, then process flexibility is improved, but they cannot act as suitable hermetic and copper barrier layers

Engineering Contradiction:
Improveprocess flexibilityVSAvoidhermetic and copper barrier properties
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The invention merges the deposition processes into a single integrated atomic layer deposition (ALD) process that deposits both the etch stop layer and dielectric barrier layer in sequence without breaking vacuum. This combining of processes maintains process flexibility while ensuring continuous deposition that prevents oxidation and maintains hermetic and copper barrier properties.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The entire deposition process occurs in an inert vacuum environment using ALD technology. This inert atmosphere prevents oxidation of the aluminum nitride etch stop layer and ensures proper formation of both layers, maintaining their hermetic and copper barrier properties while allowing process flexibility through controlled deposition parameters.

Inventive Principle:
Principle #39Inert atmosphere (Inert environment)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces film thickness and RC delay while maintaining etch stop and barrier properties, improving reliability and selectivity by preventing oxidation and enhancing hermeticity, thereby supporting the scaling of copper interconnects.

Implementation Method 1

depositing an aluminum etch stop layer via a physical vapor deposition process

Methodology Applied
Scientific EffectPhysical vapor deposition: Physical Vapour Deposition

Implementation Method 2

depositing a barrier layer atop the etch stop layer via a chemical vapor deposition process

Methodology Applied
Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Data Source

PatentUS10707122B2Methods for depositing dielectric barrier layers and aluminum containing etch stop layers
Publication Date: 2020.07.07 APPLIED MATERIALS INC
  • US10707122B2 patent drawing
  • US10707122B2 patent drawing
  • US10707122B2 patent drawing

AI summary

In some embodiments, a method of forming an interconnect structure includes selectively depositing a barrier layer atop a substrate having one or more exposed metal surfaces and one or more exposed dielectric surfaces, wherein a thickness of the barrier layer atop the one or more exposed metal surfaces is greater than the thickness of the barrier layer atop the one or more exposed dielectric surfaces. In some embodiments, a method of forming an interconnect structure includes depositing an etch stop layer comprising aluminum atop a substrate via a physical vapor deposition process; and depositing a barrier layer atop the etch stop layer via a chemical vapor deposition process, wherein the substrate is transferred from a physical vapor deposition chamber after depositing the etch stop layer to a chemical vapor deposition chamber without exposing the substrate to atmosphere.