Selective Metal Barrier Deposition for Low-Resistance Damascene Vias
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Solution Overview
Problem
In damascene processes for forming metal lines and vias in integrated circuits, existing methods face challenges in selectively depositing a conductive barrier layer that prevents copper diffusion into dielectric layers while minimizing contact resistance and ensuring uniformity, particularly due to the growth of the barrier layer on inhibitor films and bare copper surfaces.
Innovation Solution
A method involving the formation of an inhibitor film on conductive features, followed by selective deposition of a conductive barrier layer using Atomic Layer Deposition (ALD) with a delayed growth mechanism, where the inhibitor film delays the growth of the barrier layer on sidewalls, and a post-deposition treatment removes the inhibitor film, allowing copper filling and improving barrier layer density and diffusion blocking.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conductive barrier layer is deposited using conventional methods, then copper diffusion into dielectric layers is prevented, but contact resistance increases and uniformity deteriorates due to barrier layer growth on inhibitor films
Solution Approach 1:
The patent applies preliminary action by forming an inhibitor film on the copper surface before barrier layer deposition. This inhibitor film serves as a temporary protective layer that prevents unwanted barrier layer growth on the copper surface during the deposition process. The inhibitor film is removed after deposition, leaving a uniform barrier layer only on the dielectric sidewalls and trench bottoms, thus resolving the uniformity issue while maintaining copper diffusion blocking capability
Solution Approach 2:
The inhibitor film acts as an intermediary layer between the copper conductive feature and the conductive barrier layer. It mediates the deposition process by selectively preventing barrier layer formation on copper surfaces while allowing it on dielectric surfaces. This intermediary approach enables precise control over barrier layer location and thickness, improving both uniformity and contact resistance characteristics
2Reliability
If a conductive barrier layer is deposited to ensure complete coverage, then copper diffusion blocking is improved, but via contact resistance increases due to barrier layer formation on all surfaces including copper
Solution Approach 1:
The patent applies local quality by creating spatially varying barrier layer coverage. The barrier layer is selectively deposited only on dielectric surfaces (sidewalls and trench bottoms) where diffusion blocking is needed, while being prevented from forming on copper surfaces where low contact resistance is critical. This local differentiation resolves the contradiction by providing complete diffusion blocking where required while maintaining low contact resistance at copper interfaces
Solution Approach 2:
The inhibitor film is formed in advance on copper surfaces to prevent unwanted barrier layer deposition. This preliminary protective action ensures that when the barrier layer is deposited, it only forms on dielectric surfaces, thereby maintaining low contact resistance at via bottoms while still providing complete diffusion blocking on dielectric surfaces
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in reduced via contact resistance, improved barrier layer density, and effective copper diffusion blocking, enhancing the integration of metal lines and vias in integrated circuits by selectively forming the conductive barrier layer on sidewalls and preventing its growth on inhibitor films, thus addressing the challenges of contact resistance and uniformity.
Implementation Method 1
selective deposition of a conductive barrier layer using Atomic Layer Deposition (ALD) with a delayed growth mechanism
Implementation Method 2
conductive barrier layer that prevents copper diffusion into dielectric layers
Data Source
AI summary
A method of forming an integrated circuit structure includes forming an etch stop layer over a conductive feature, forming a dielectric layer over the etch stop layer, forming an opening in the dielectric layer to reveal the etch stop layer, and etching the etch stop layer through the opening using an etchant comprising an inhibitor. An inhibitor film comprising the inhibitor is formed on the conductive feature. The method further includes depositing a conductive barrier layer extending into the opening, performing a treatment to remove the inhibitor film after the conductive barrier layer is deposited, and depositing a conductive material to fill a remaining portion of the opening.