Selective Barrier Film Layout for Low-Resistance FET Contacts
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Solution Overview
Problem
Current semiconductor manufacturing processes face challenges in thermal processing, particularly in three-dimensional device integration, where high temperatures can lead to agglomeration of silicides, diffusion of silicon and dopants into interconnect metals, and increased contact resistance, limiting device performance.
Innovation Solution
The use of a selective barrier film deposition process, where a thicker barrier film is applied only over the silicide layer and a thinner film is conformally formed on the inner surface of the interconnect structure, minimizing diffusion while maintaining low resistance, and a contact etch stop layer is selectively deposited to prevent shorting and enhance interconnect structure alignment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a uniform thick barrier film is formed on the entire interconnect structure, then diffusion protection is improved, but contact resistance increases
Solution Approach 1:
The patent applies different barrier film thicknesses to different locations: a first thicker barrier film is formed on the silicide layer to prevent diffusion, while a second thinner barrier film is formed on the inner surface of the trench structure to provide minimal diffusion protection while reducing resistance. This local differentiation resolves the contradiction between diffusion protection and contact resistance.
2Productivity
If high temperature processing is used, then manufacturing efficiency is improved, but silicide agglomeration occurs
Solution Approach 1:
The patent forms the barrier film structure before final interconnect formation, and uses a contact etch stop layer during trench formation to protect the silicide layer. These preliminary protective actions prevent silicide agglomeration during subsequent high-temperature processing steps, enabling efficient manufacturing without compromising silicide structure.
3Reliability
If barrier film thickness is increased, then diffusion protection is improved, but interconnect resistance increases
Solution Approach 1:
The patent strategically places thicker barrier film only where diffusion protection is most critical (on the silicide layer), and uses thinner barrier film on the trench inner surface. This local quality differentiation provides adequate diffusion protection while minimizing the resistive effect of the barrier film on the interconnect structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the diffusion of silicon and dopants into interconnect metals, mitigates agglomeration, and improves conductance by optimizing the thickness and placement of barrier films, thereby enhancing the performance and reliability of three-dimensional semiconductor devices.
Implementation Method 1
a selective barrier film deposition process, where a thicker barrier film is applied only over the silicide layer and a thinner film is conformally formed on the inner surface of the interconnect structure
Implementation Method 2
reduces the diffusion of silicon and dopants into interconnect metals
Data Source
AI summary
A semiconductor device includes a field-effect transistor (FET) having a source/drain (S/D) structure and an interconnect structure in contact with the S/D structure. The interconnect structure has a barrier film at a surface of the interconnect structure separating the interconnect structure from materials surrounding the interconnect structure. A first portion of the barrier film covers a first interface between the interconnect structure and the S/ID structure. A second portion of the barrier film covers a second interface between the interconnect structure and dielectric materials adjacent to the interconnect structure. The first portion of the barrier film is thicker than the second portion of the barrier.


