Data Reading Circuit With Selective Current Trimming for Fast RRAM Reads
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Solution Overview
Problem
Conventional resistive random access memory (RRAM) data reading circuits face issues with low circuit yield due to process deviations causing incorrect data readings, and existing trimming circuits occupy a large board area and slow down read speeds.
Innovation Solution
A data reading circuit with a single current trimming circuit that selectively trims currents of either the data or reference branch using switches, reducing board area and parasitic capacitors, and includes multiple trimming branches to adjust current levels accurately.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If symmetric trimming circuits are disposed on both data branch and reference branch of each S/A, then precision of I_REF is improved, but board area is increased and read speed is slowed down
Solution Approach 1:
The patent extracts the trimming function from both branches and consolidates it into a single trimming circuit. Instead of having symmetric trimming circuits on both the data branch and reference branch, the invention uses one trimming circuit that can selectively trim either branch, thereby reducing board area while maintaining the precision improvement benefit
Solution Approach 2:
The single trimming circuit is designed to be universal, capable of trimming currents in both the data branch and reference branch through switching mechanisms. This multi-functional design allows one circuit to perform the work of two separate circuits, reducing overall board area while maintaining measurement precision
2Measurement precision
If symmetric trimming circuits are disposed on both data branch and reference branch of each S/A, then precision of I_REF is improved, but read speed is slowed down
Solution Approach 1:
By extracting the trimming function from both branches and consolidating it into a single trimming circuit, the patent reduces the total number of parasitic capacitors in the circuit. This reduction in parasitic capacitance minimizes the loading effect on the sense amplifier, thereby maintaining fast read speeds while still achieving improved reference current precision
Solution Approach 2:
The patent merges the trimming functions of both branches into a single trimming circuit. This consolidation reduces the total parasitic capacitance compared to having separate trimming circuits on both branches, thereby preserving read speed while maintaining the ability to precisely trim the reference current
3Measurement precision
If trimming circuit is used to correct I_REF deviation, then data reading accuracy is improved, but circuit complexity is increased
Solution Approach 1:
The patent employs a universal trimming circuit that can trim both the data branch and reference branch currents. This single multi-functional circuit replaces what would traditionally require two separate trimming circuits, thereby improving data reading accuracy through current trimming while actually reducing overall circuit complexity
Solution Approach 2:
The patent uses switching mechanisms to selectively connect the trimming circuit to either the data branch or reference branch as needed. This dynamic reconfiguration allows the same trimming circuit to serve multiple purposes, improving accuracy while minimizing the permanent circuit structure and reducing complexity
Data Source
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AI summary
A data reading circuit and a data reading circuit control method are disclosed, and relate to the field of circuit technologies, to resolve problems in the conventional technology that a waste is caused because a trimming circuit of a memory occupies a large board area and a read speed is low. A specific solution is as follows: The data reading circuit includes a sense amplifier, a first switch, a second switch, a current trimming circuit, a data cell, and a reference cell; a first input terminal of the sense amplifier is coupled to a first terminal of the first switch and the data cell, a second input terminal of the sense amplifier is coupled to a first terminal of the second switch and the reference cell, and a second terminal of the first switch is coupled to a second terminal of the second switch through the current trimming circuit; and the current trimming circuit is configured to trim a current of the first input terminal of the sense amplifier, or trim a current of the second input terminal of the sense amplifier.