Selective Data Decompression for Lower RAM Bandwidth Waste
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Solution Overview
Problem
Large compression units in data compression schemes lead to inefficient use of RAM bandwidth when acquiring partial data, resulting in wasted bandwidth due to the transfer of unnecessary data portions.
Innovation Solution
A data decompression apparatus with a read control unit, decompression unit, and write control unit that stops transferring compressed data from RAM once the specified partial data is decompressed and stored, minimizing unnecessary data transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a large compression unit is used to improve data compression efficiency, then the compression ratio is improved, but the RAM bandwidth is wasted due to transferring unnecessary data portions
Solution Approach 1:
The patent divides the decompression process into two independent stages: (1) decompression stage that processes compressed data and generates decompressed data, and (2) data transfer stage that selectively transfers only the requested portions of decompressed data to the host. This segmentation allows the system to decompress large data units for efficiency while transferring only small necessary portions, resolving the bandwidth waste problem.
Solution Approach 2:
The patent implements partial decompression where the decompression unit processes compressed data beyond what is strictly necessary, generating complete decompressed data blocks, but the transfer control unit then selectively transfers only the specific portions requested by the host. This approach maintains compression efficiency by processing in large units while avoiding bandwidth waste through selective transfer.
2Productivity
If a large compression unit is used to improve data compression efficiency, then the compression ratio is improved, but the data transfer time is increased due to processing larger data blocks
Solution Approach 1:
The patent separates the time-consuming decompression process from the data transfer process by implementing a two-stage architecture. The decompression unit processes large compressed data units in the background to achieve high compression efficiency, while the transfer control unit independently manages selective transfer of only the requested data portions to the host, minimizing actual transfer time.
Solution Approach 2:
The decompression unit performs preliminary decompression of large compressed data blocks into fully decompressed data blocks and stores them in memory before the host requests specific portions. This preliminary action allows the transfer control unit to quickly retrieve and transfer only the necessary data portions without waiting for decompression to complete, reducing data transfer time.
3Productivity
If a large compression unit is used to improve data compression efficiency, then the compression ratio is improved, but the device complexity is increased due to additional control mechanisms
Solution Approach 1:
The transfer control unit is designed with multi-functionality, serving both as the interface for receiving host requests specifying data portions to be transferred and as the controller for managing the selective transfer process. This universal component handles both request interpretation and transfer control, reducing the need for separate dedicated control circuits and minimizing device complexity.
Data Source
AI summary
A data decompression apparatus includes a read control circuit, a decompression circuit, and a write control circuit. The read control circuit reads compressed data stored in a first storage area starting from a first address in a random access memory. The decompression circuit decompresses the compressed data in an order from a head to generate decompressed data. The write control circuit, in response to receiving first information specifying data portions to be stored in the random access memory and a second address from the host: transfers the data portions specified in the first information to a second storage area starting from the second address, and outputs a signal indicating that transfer has been completed to the read control circuit. In response to the signal output from the write control circuit, the read control circuit performs control to stop reading the compressed data stored in the first storage area.