Selective Data Inversion Circuit for Low-Power Memory Transmission
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Solution Overview
Problem
The increasing density and number of memory cells in semiconductor storage arrays lead to longer data transmission paths, resulting in higher power consumption and increased probability of data transmission errors, necessitating a solution to reduce power consumption and improve data transmission accuracy.
Innovation Solution
A data transmission circuit comprising a check circuit, comparison circuit, and data conversion circuit that generates check code data, compares data with a preset threshold, and inverts data only when necessary to reduce power consumption while ensuring transmission accuracy, incorporating error correction mechanisms to prevent data errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the density and number of memory cells in memory cell arrays are increased, then storage capacity is improved, but the length of data transmission path increases leading to higher power consumption and increased probability of data transmission errors
Solution Approach 1:
The patent applies preliminary action by performing data inversion prediction before actual data transmission. The prediction circuit pre-calculates whether data inversion is needed based on write enable signals and data patterns, allowing the system to prepare the optimal transmission state in advance. This prevents unnecessary data inversions and reduces power consumption in the data transmission path while maintaining storage capacity improvements.
2Quantity of substance
If the density and number of memory cells in memory cell arrays are increased, then storage capacity is improved, but the probability of occurrence of data transmission errors increases
Solution Approach 1:
The patent implements feedback through the prediction circuit that continuously monitors write enable signals and data patterns to determine optimal data inversion decisions. This feedback mechanism allows the system to adaptively adjust data transmission states based on actual operating conditions, reducing data transmission errors while maintaining high storage capacity. The prediction results feed back into the data transmission process to ensure reliable data writing.
3Reliability
If data inversion is performed frequently to ensure data transmission accuracy, then data transmission reliability is improved, but power consumption increases
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the data inversion decision based on multiple parameters including write enable signals, data patterns, and prediction results. Instead of using a fixed inversion strategy, the system changes the inversion parameter adaptively to minimize power consumption while maintaining data transmission accuracy. This selective inversion approach reduces unnecessary power consumption compared to frequent inversion methods.
4Use of energy by moving object
If the length of data transmission path is reduced to lower power consumption, then power consumption is improved, but storage capacity is limited
Solution Approach 1:
The patent introduces an intermediary prediction circuit between the data generation stage and the data transmission path. This intermediary component analyzes data patterns and predicts optimal inversion decisions without requiring physical shortening of the transmission path. By adding this intelligent intermediary layer, the system achieves power consumption reduction through smart decision-making rather than physical path reduction, thus maintaining both low power consumption and high storage capacity.
Data Source
AI summary
A data transmission circuit, a data transmission method, and a storage apparatus are provided. The data transmission circuit includes a check circuit, a comparison circuit, and a data conversion circuit. The check circuit is configured to generate check code data according to first data on a first data line, and combine the first data and the check code data into second data. The comparison circuit is configured to receive the second data and third data on the second data line, and compare the second data with the third data to output a comparison result indicating whether number of different bits between the second data and the third data exceeds a preset threshold. The data conversion circuit is configured to invert the second data and transmit the inverted second data to the second data line when the comparison result is indicative of exceeding the preset threshold.


