Selective Die Insulation Additive Process for Stacked Interconnects
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Solution Overview
Problem
The electrical interconnection of stacked semiconductor die presents challenges due to the need for vertical and horizontal clearance for wire bonds, which can lead to increased package thickness and complexity, especially when the upper die overlaps the margin of the lower die, requiring spacers and sequential stacking processes.
Innovation Solution
The use of additive processes for electrically insulating selected surface regions of the die, allowing for the application of dielectric material only where necessary, preventing electrical contact and enabling efficient electrical connection through conductive traces without the need for extensive insulation removal or additional thickness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wire bond interconnect is used for stacked die, then electrical connection between die is achieved, but vertical and horizontal clearance is required increasing package thickness and complexity
Solution Approach 1:
The patent extracts the wire bond interconnect method and replaces it with direct die-to-die bonding. By removing the wire bond intermediary, the package thickness is reduced while maintaining electrical connection reliability. The upper die is directly bonded to the lower die without requiring vertical clearance for wire loops or horizontal clearance for wire spans.
Solution Approach 2:
The patent introduces an insulative coating as an intermediary layer between the die surfaces. This coating enables direct die-to-die bonding while providing electrical insulation, eliminating the need for wire bonds and spacers. The insulative coating acts as a mediator that allows both electrical connection and insulation in the same structure.
2Reliability
If spacers are used to provide vertical clearance for wire bonds, then electrical connection is enabled, but package thickness increases
Solution Approach 1:
The patent removes the spacer component entirely by adopting direct die-to-die bonding. The insulative coating is applied directly to the die surfaces, eliminating the need for separate spacer structures that would increase package thickness.
Solution Approach 2:
The patent merges the insulation function and the spacing function into a single insulative coating layer applied to the die surfaces. This combined approach eliminates the need for separate spacers while maintaining both electrical insulation and proper die spacing.
3Reliability
If selective insulation is applied to die surfaces, then electrical shorts are prevented, but manufacturing complexity increases
Solution Approach 1:
The patent applies insulative coating selectively to specific regions of the die surfaces using local quality. The coating is applied to interconnect margins and specific pad regions rather than uniformly across the entire die surface. This selective application prevents electrical shorts while maintaining manufacturing simplicity through targeted deposition processes.
Solution Approach 2:
The insulative coating is applied preliminarily to the die surfaces before the die are bonded together. This preliminary insulation application simplifies the manufacturing process by preventing electrical shorts before they can occur, eliminating the need for complex post-bonding insulation steps or modifications.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies processing, reduces material costs, and minimizes package thickness by allowing for more precise control over interconnects, avoiding electrical shorts and enabling narrower pitch interconnects without additional insulation between die layers.
Implementation Method 1
directing an aerosolized electrically insulative material onto the region
Data Source
AI summary
Additive processes are employed for electrically insulating selected surface regions on a stack of die; and methods for electrically interconnecting die in a stack of die, include additive processes for electrically insulating selected surface regions of the die. Regions that are not insulated according to the invention are available for electrical connection using electrically conductive material applied in flowable form to make electrically conductive traces.