Selective DMA Packet Truncation for Network Interface Cards
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Solution Overview
Problem
Modern computer networks face inefficiencies and reliability issues due to increased data volume, leading to CPU and memory bus strain, packet loss, and bandwidth consumption, despite the use of powerful processors and memory systems.
Innovation Solution
Implementing selective direct memory access (DMA) with network interface cards (NICs) that truncate packets based on predefined rules, storing only relevant portions in memory and forwarding the full packets to their destinations, thereby reducing bandwidth usage and memory requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If DMA controllers store complete packets in high speed memory, then network system reliability is improved, but bandwidth consumption increases
Solution Approach 1:
The patent extracts only the essential header information from complete packets and stores only this extracted data in memory, while discarding the redundant packet payloads. This extraction approach maintains reliability for network monitoring and troubleshooting while dramatically reducing bandwidth consumption and memory requirements.
Solution Approach 2:
The patent segments packets into useful header portions and unnecessary payload data, selectively storing only the header segments in memory. This segmentation allows the system to maintain network reliability for monitoring purposes while reducing the bandwidth and memory resources consumed by storing complete packets.
2Productivity
If powerful processors and high-speed memory systems are used, then network system performance is improved, but system cost and complexity increase
Solution Approach 1:
The patent implements self-service by enabling network interface cards to autonomously decode packets and determine which data should be stored in memory without requiring CPU intervention. This autonomous operation reduces system complexity by eliminating the need for complex CPU-based packet filtering and address generation, while maintaining high network performance.
Solution Approach 2:
The patent introduces DMA controllers as intermediary components that handle packet decoding and memory storage operations independently from the CPU. These intermediaries relieve the processor of complex packet processing tasks, reducing overall system complexity while maintaining high network system performance through dedicated hardware assistance.
3Loss of information
If complete packets are stored in memory for monitoring, then network monitoring capability is improved, but memory requirements increase
Solution Approach 1:
The patent extracts only the header information from complete packets and stores only this extracted data in memory, while discarding the redundant packet payloads. This extraction approach maintains network monitoring capability for troubleshooting and analysis while dramatically reducing memory requirements.
Solution Approach 2:
The patent applies partial action by storing only the necessary header portions of packets rather than complete packets. This partial storage approach provides sufficient information for network monitoring and troubleshooting while significantly reducing memory consumption compared to storing complete packet data.
Data Source
AI summary
A method of selective direct memory access (DMA) in a computer system having a network interface card (NIC), a processor subsystem, and a memory accessible to the subsystem, including the steps of the NIC receiving a plurality of packets from an external source; the NIC decoding a portion of each packet and determining whether the packet should be accepted by the computer system based on a predefined rule; and if the packet is accepted, selectively truncating the packet based on the predefined rule, and storing the truncated packet in the memory.


